Reference Manuals

• Comportability Definition and Specification
• Device Interface Function (DIF) Specification
• Tool Guides
  • Topgen Tool: Describes topgen.py and its Hjson format source. Used to generate rtl and validation files for top specific modules such as PLIC, Pinmux and crossbar.
  • Register Tool: Describes regtool.py and its Hjson format source. Used to generate documentation, rtl, header files and validation files for IP Registers and toplevel.
  • Ipgen Tool: Describes ipgen.py and its Hjson control file. Used to generate IP blocks from IP templates.
  • Crossbar Tool: Describes tlgen.py and its Hjson format source. Used to generate self-documentation, rtl files of the crossbars at the toplevel.
  • Vendor-In Tool: Describes util/vendor.py and its Hjson control file. Used to pull a local copy of code maintained in other upstream repositories and apply local patch sets.
• Coding Style Guides
  • Verilog Coding Style
  • Python Coding Style
  • Hjson Usage and Style Guide
  • Markdown Usage and Style Guide
  • C/C++ Style Guide
  • RISC-V Assembly Style Guide
• FPGA Reference Manual