User Guides

• Getting Started
  • Getting started
  • Quickstart
  • Notes on using GitHub and local git
  • Directory Structure
  • Build software
  • Getting started with Verilator
  • Getting started on FPGAs
  • Obtaining an FPGA board
  • Installing Xilinx Vivado
  • Getting started with a design
  • Getting started with verification
• Work with hardware code in external repositories
• Design Methodology
  • Language and Tool Selection
  • Comportability and the Importance of Architectural Conformity
  • Defining Design Complete: stages and tracking
  • Documentation
  • Usage of Register Tool
  • Linting Methodology
  • Assertions Methodology
  • CDC Methodology
  • DFT
  • Generated Code
  • FPGA vs ASIC
• Design Verification Methodology
  • Language and Tool Selection
  • Defining Verification Complete: Stages and Checklists
  • Documentation
  • Automation
  • Code Reuse
  • DV Efforts in OpenTitan
  • Key Test Focus Areas
  • Assertions
  • Regressions
  • Coverage Collection
  • FPV
  • Reviews
  • Filing Issues
  • Pending Work Items