List of Top-Level Designs

This page lists all top-level designs and their targets that are contained within this repository. Click on the design name to get more information about the design.

Design Internal Name Simulation Targets FPGA Targets ASIC Targets Description
Earl Grey top_earlgrey Verilator Nexys Video* None yet. 0.1 release

A * behind an FPGA board indicates it can be used with a free EDA tool license.