OTP_CTRL Checklist

This checklist is for Hardware Stage transitions for the OTP_CTRL peripheral. All checklist items refer to the content in the Checklist.

Design Checklist

D1

Type Item Resolution Note/Collaterals
Documentation SPEC_COMPLETE Done OTP_CTRL Design Spec
Documentation CSR_DEFINED Done
RTL CLKRST_CONNECTED Done
RTL IP_TOP Done
RTL IP_INSTANTIABLE Done
RTL PHYSICAL_MACROS_DEFINED_80 Done
RTL FUNC_IMPLEMENTED Done
RTL ASSERT_KNOWN_ADDED Done
Code Quality LINT_SETUP Done

D2

Type Item Resolution Note/Collaterals
Documentation NEW_FEATURES Done
Documentation BLOCK_DIAGRAM Done
Documentation DOC_INTERFACE Done
Documentation MISSING_FUNC Done
Documentation FEATURE_FROZEN Done
RTL FEATURE_COMPLETE Done
RTL AREA_CHECK Done Note, area will be impacted by how many HW_CFG bits will be used eventually. The current area is a worst case scenario, since all available HW_CFG bits are buffered at the moment. Memory map will be finalized by D3.
RTL PORT_FROZEN Done
RTL ARCHITECTURE_FROZEN Done Note that the KMAC token hashing interface change is deferred to after D2 (this is a security hardening task). Also, the closed source OTP wrapper is still outstanding.
RTL REVIEW_TODO Done
RTL STYLE_X Done
Code Quality LINT_PASS Done
Code Quality CDC_SETUP Waived CDC flow is not available yet.
Code Quality FPGA_TIMING Done
Code Quality CDC_SYNCMACRO Done
Security SEC_CM_IMPLEMENTED Done
Security SEC_NON_RESET_FLOPS N/A
Security SEC_SHADOW_REGS N/A
Security SEC_RND_CNST Done

D3

Type Item Resolution Note/Collaterals
Documentation NEW_FEATURES_D3 Not Started TODO: Finalize memory map, make memory map top-specific.
RTL TODO_COMPLETE Not Started
Code Quality LINT_COMPLETE Not Started
Code Quality CDC_COMPLETE Not Started
Review REVIEW_RTL Not Started
Review REVIEW_DELETED_FF Not Started
Review REVIEW_SW_CSR Not Started
Review REVIEW_SW_FATAL_ERR Not Started
Review REVIEW_SW_CHANGE Not Started
Review REVIEW_SW_ERRATA Not Started
Review Reviewer(s) Not Started
Review Signoff date Not Started

Verification Checklist

V1

Type Item Resolution Note/Collaterals
Documentation DV_DOC_DRAFT_COMPLETED Done OTP_CTRL DV document
Documentation TESTPLAN_COMPLETED Done OTP_CTRL Testplan
Testbench TB_TOP_CREATED Done
Testbench PRELIMINARY_ASSERTION_CHECKS_ADDED Done
Testbench SIM_TB_ENV_CREATED Done
Testbench SIM_RAL_MODEL_GEN_AUTOMATED Done
Testbench CSR_CHECK_GEN_AUTOMATED Done
Testbench TB_GEN_AUTOMATED Done
Tests SIM_SMOKE_TEST_PASSING Done
Tests SIM_CSR_MEM_TEST_SUITE_PASSING Done
Tests FPV_MAIN_ASSERTIONS_PROVEN N/A
Tool Setup SIM_ALT_TOOL_SETUP Done
Regression SIM_SMOKE_REGRESSION_SETUP Done
Regression SIM_NIGHTLY_REGRESSION_SETUP Done
Regression FPV_REGRESSION_SETUP N/A
Coverage SIM_COVERAGE_MODEL_ADDED Done
Code Quality TB_LINT_SETUP Done
Integration PRE_VERIFIED_SUB_MODULES_V1 N/A Exception for IP modules
Review DESIGN_SPEC_REVIEWED Done
Review TESTPLAN_REVIEWED Done
Review STD_TEST_CATEGORIES_PLANNED Done Exception (Security, Power, Debug)
Review V2_CHECKLIST_SCOPED Done

V2

Type Item Resolution Note/Collaterals
Documentation DESIGN_DELTAS_CAPTURED_V2 Done
Documentation DV_DOC_COMPLETED Done
Testbench FUNCTIONAL_COVERAGE_IMPLEMENTED Done
Testbench ALL_INTERFACES_EXERCISED Done
Testbench ALL_ASSERTION_CHECKS_ADDED Done
Testbench SIM_TB_ENV_COMPLETED Done
Tests SIM_ALL_TESTS_PASSING Done
Tests FPV_ALL_ASSERTIONS_WRITTEN N/A
Tests FPV_ALL_ASSUMPTIONS_REVIEWED N/A
Tests SIM_FW_SIMULATED N/A
Regression SIM_NIGHTLY_REGRESSION_V2 Done
Coverage SIM_CODE_COVERAGE_V2 Done
Coverage SIM_FUNCTIONAL_COVERAGE_V2 Done
Coverage FPV_CODE_COVERAGE_V2 N/A
Coverage FPV_COI_COVERAGE_V2 N/A
Code Quality TB_LINT_PASS Done
Integration PRE_VERIFIED_SUB_MODULES_V2 Done Waived prim_alert_sender and prim_lfsr
Issues NO_HIGH_PRIORITY_ISSUES_PENDING Done
Issues ALL_LOW_PRIORITY_ISSUES_ROOT_CAUSED Done
Review DV_DOC_TESTPLAN_REVIEWED Done Reviewed on 05/24/2021
Review V3_CHECKLIST_SCOPED Done

V3

Type Item Resolution Note/Collaterals
Documentation DESIGN_DELTAS_CAPTURED_V3 Not Started
Tests X_PROP_ANALYSIS_COMPLETED Not Started
Tests FPV_ASSERTIONS_PROVEN_AT_V3 Not Started
Regression SIM_NIGHTLY_REGRESSION_AT_V3 Not Started
Coverage SIM_CODE_COVERAGE_AT_100 Not Started
Coverage SIM_FUNCTIONAL_COVERAGE_AT_100 Not Started
Coverage FPV_CODE_COVERAGE_AT_100 Not Started
Coverage FPV_COI_COVERAGE_AT_100 Not Started
Code Quality ALL_TODOS_RESOLVED Not Started
Code Quality NO_TOOL_WARNINGS_THROWN Not Started
Code Quality TB_LINT_COMPLETE Not Started
Integration PRE_VERIFIED_SUB_MODULES_V3 Not Started
Issues NO_ISSUES_PENDING Not Started
Review Reviewer(s) Not Started
Review Signoff date Not Started