Interrupt Controller Technical Specification

Overview

This document specifies the Interrupt Controller (RV_PLIC) functionality. This module conforms to the Comportable guideline for peripheral functionality. See that document for integration overview within the broader top level system.

Features

  • RISC-V Platform-Level Interrupt Controller (PLIC) compliant interrupt controller
  • Support arbitrary number of interrupt vectors (up to 255) and targets
  • Support interrupt enable, interrupt status registers
  • Memory-mapped MSIP register per HART for software interrupt control.

Description

The RV_PLIC module is designed to manage various interrupt sources from the peripherals. It receives interrupt events as either edge or level of the incoming interrupt signals (intr_src_i) and can notify multiple targets.

Compatibility

The RV_PLIC is compatible with any RISC-V core implementing the RISC-V privilege specification.

Theory of Operations

Block Diagram

RV_PLIC Block Diagram

Hardware Interfaces

Referring to the Comportable guideline for peripheral device functionality, the module RV_PLIC has the following hardware interfaces defined.

Primary Clock: clk_i

Other Clocks: none

Bus Device Interfaces (TL-UL): tl

Bus Host Interfaces (TL-UL): none

Peripheral Pins for Chip IO: none

Interrupts: none

Security Alerts: none

Design Details

Identifier

Each interrupt source has a unique ID assigned based upon its bit position within the input intr_src_i. ID ranges from 0 to N, the number of interrupt sources. ID 0 is reserved and represents no interrupt. The bit 0 of intr_src_i shall be tied to 0 from the outside of RV_PLIC. The intr_src_i[i] bit has an ID of i. This ID is used when targets “claim” the interrupt and to “complete” the interrupt event.

Priority and Threshold

Interrupt sources have configurable priority values. The maximum value of the priority is configurable through the localparam MAX_PRIO in the rv_plic top-level module. For each target there is a threshold value (THRESHOLD0 for target 0). RV_PLIC notifies a target of an interrupt only if it’s priority is strictly greater than the target’s threshold. Note this means an interrupt with a priority is 0 is effectively prevented from causing an interrupt at any target and a target can suppress all interrupts by setting it’s threshold to the max priority value.

MAX_PRIO parameter is most area contributing option in RV_PLIC. If MAX_PRIO is big, then finding the highest priority in Process module may consume a lot of logic gates.

Interrupt Gateways

The Gateway observes incoming interrupt sources and converts them to a common interrupt format used internally by RV_PLIC. It can be configured to detect interrupts events on an edge (when the signal changes from 0 to 1) or level basis (where the signal remains at 1).

When the gateway detects an interrupt event it raises the interrupt pending bit (IP) for that interrupt source. When an interrupt is claimed by a target the relevant bit of IP is cleared. A bit in IP will not be reasserted until the target signals completion of the interrupt. Any new interrupt event between a bit in IP asserting and completing that interrupt is ignored. In particular this means that for edge triggered interrupts if a new edge is seen after the source’s IP bit is asserted but before completion, that edge will be ignored (counting missed edges as discussed in the RISC-V PLIC specification is not supported).

Note that there is no ability for a level triggered interrupt to be cancelled. If the interrupt drops after the gateway has set a bit in IP, the bit will remain set until the interrupt is completed. The SW handler should be conscious of this and check the interrupt still requires handling in the handler if this behaviour is possible.

Interrupt Enables

Each target has a set of Interrupt Enable (IE0 for target 0) registers. Each bit in the IE0 registers controls the corresponding interrupt source. If an interrupt source is disabled for a target, then interrupt events from that source won’t trigger an interrupt at the target. RV_PLIC doesn’t have a global interrupt disable feature.

Interrupt Claims

“Claiming” an interrupt is done by a target reading the associated Claim/Completion register for the target (CC0 for target 0). The return value of the CC0 read represents the ID of the pending interrupt that has the highest priority. If two or more pending interrupts have the same priority, RV_PLIC chooses the one with lowest ID. Only interrupts that that are enabled for the target can be claimed. The target priority threshold doesn’t matter (this only factors into whether an interrupt is signalled to the target) so lower priority interrupt IDs can be returned on a read from CC0. If no interrupt is pending (or all pending interrupts are disabled for the target) a read of CC0 returns an ID of 0.

Interrupt Completion

After an interrupt is claimed, the relevant bit of interrupt pending (IP) is cleared, regardless of the status of the intr_src_i input value. Until a target “completes” the interrupt, it won’t be re-asserted if a new event for the interrupt occurs. A target completes the interrupt by writing the ID of the interrupt to the Claim/Complete register (CC0 for target 0). The write event is forwarded to the Gateway logic, which resets the interrupt status to accept a new interrupt event. The assumption is that the processor has cleaned up the originating interrupt event during the time between claim and complete such that intr_src_i[ID] will have de-asserted (unless a new interrupt has occurred).

In the example above an interrupt for source ID i is configured as a level interrupt and is raised at a, this results in the target being notified of the interrupt at b. The target claims the interrupt at c (reading i from it’s Claim/Complete register) so irq_o deasserts though intr_src_i[i] remains raised. The SW handles the interrupt and it drops at e. However a new interrupt quickly occurs at f. As complete hasn’t been signaled yet irq_o isn’t asserted. At g the interrupt is completed (by writing i to it’s Claim/Complete register) so at h irq_o is asserted due to the new interrupt.

Programmers Guide

Initialization

After reset, RV_PLIC doesn’t generate any interrupts to any targets even if interrupt sources are set, as all priorities and thresholds are 0 by default and all IE values are 0. Software should configure the above three registers and the interrupt source type LE .

LE and PRIO0 .. PRIO31 registers are unique. So, only one of the targets shall configure them.

// Pseudo-code below
void plic_init() {
  // Set to level-triggered for interrupt sources
  for (int i = 0; i < ceil(N_SOURCE / 32); ++i) {
    *(LE + i) = 0;
  }

  // Configure priority
  // Note that PRIO0 register doesn't affect as intr_src_i[0] is tied to 0.
  for (int i = 0; i < N_SOURCE; ++i) {
    *(PRIO + i) = value(i);
  }
}

void plic_threshold(tid, threshold) {
  *(THRESHOLD + tid) = threshold;
}

void plic_enable(tid, iid) {
  // iid: 0-based ID
  int offset = ceil(N_SOURCE / 32) * tid + (iid >> 5);

  *(IE + offset) = *(IE + offset) | (1 << (iid % 32));
}

Handling Interrupt Request Events

If software receives an interrupt request, it is recommended to follow the steps shown below (assuming target 0 which uses CC0 for claim/complete).

  1. Claim the interrupts right after entering to the interrupt service routine by reading the CC0 register.
  2. Determine which interrupt should be serviced based on the values read from the CC0 register.
  3. Execute ISR, clearing the originating peripheral interrupt.
  4. Write Interrupt ID to CC0
  5. Repeat as necessary for other pending interrupts.

It is possible to have multiple interrupt events claimed. If software claims one interrupt request, then the process module advertises any pending interrupts with lower priority unless new higher priority interrupt events occur. If a higher interrupt event occurs after previous interrupt is claimed, the RV_PLIC IP advertises the higher priority interrupt. Software may utilize an event manager inside a loop so that interrupt claiming and completion can be separated.

void interrupt_service() {
  uint32_t tid = /* ... */;
  uint32_t iid = *(CC + tid);
  if (iid == 0) {
    // Interrupt is claimed by one of other targets.
    return;
  }

  do {
    // Process interrupts...
    // ...

    // Finish.
    *(CC + tid) = iid;
    iid = *(CC + tid);
  } while (iid != 0);
}

Device Interface Functions (DIFs)

To use this DIF, include the following C header:

#include "sw/device/lib/dif/dif_plic.h"

This header provides the following device interface functions:

Registers

The register description below matches the instance in the Earl Grey top level design.

A similar register description can be generated with reg_rv_plic.py script. The reason another script for register generation is that RV_PLIC is configurable to the number of input sources and output targets. To implement it, some of the registers (see below IE) should be double nested in register description file. As of Jan. 2019, regtool.py supports only one nested multiple register format multireg.

The RV_PLIC in the top level is generated by topgen tool so that the number of interrupt sources may be different.

  • LE: CEILING(N_SOURCE / DW) Value 1 indicates the interrupt source’s behavior is edge-triggered It is used in the gateways module.
  • IE: CEILING(N_SOURCE / DW) X N_TARGET Each bit enables corresponding interrupt source. Each target has IE set.
  • PRIO: N_SOURCE Universal set across all targets. Lower n bits are valid. n is determined by MAX_PRIO parameter
  • THRESHOLD: N_TARGET Priority threshold per target. Only priority of the interrupt greater than threshold can raise interrupt notification to the target.
  • IP: CEILING(N_SOURCE / DW) Pending bits right after the gateways. Read-only
  • CC: N_TARGET Claim by read, complete by write
RV_PLIC.IP_0 @ 0x0

Interrupt Pending

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
P_31 P_30 P_29 P_28 P_27 P_26 P_25 P_24 P_23 P_22 P_21 P_20 P_19 P_18 P_17 P_16
1514131211109876543210
P_15 P_14 P_13 P_12 P_11 P_10 P_9 P_8 P_7 P_6 P_5 P_4 P_3 P_2 P_1 P_0
BitsTypeResetNameDescription
0roxP_0

Interrupt Pending of Source

1roxP_1

Interrupt Pending of Source

2roxP_2

Interrupt Pending of Source

3roxP_3

Interrupt Pending of Source

4roxP_4

Interrupt Pending of Source

5roxP_5

Interrupt Pending of Source

6roxP_6

Interrupt Pending of Source

7roxP_7

Interrupt Pending of Source

8roxP_8

Interrupt Pending of Source

9roxP_9

Interrupt Pending of Source

10roxP_10

Interrupt Pending of Source

11roxP_11

Interrupt Pending of Source

12roxP_12

Interrupt Pending of Source

13roxP_13

Interrupt Pending of Source

14roxP_14

Interrupt Pending of Source

15roxP_15

Interrupt Pending of Source

16roxP_16

Interrupt Pending of Source

17roxP_17

Interrupt Pending of Source

18roxP_18

Interrupt Pending of Source

19roxP_19

Interrupt Pending of Source

20roxP_20

Interrupt Pending of Source

21roxP_21

Interrupt Pending of Source

22roxP_22

Interrupt Pending of Source

23roxP_23

Interrupt Pending of Source

24roxP_24

Interrupt Pending of Source

25roxP_25

Interrupt Pending of Source

26roxP_26

Interrupt Pending of Source

27roxP_27

Interrupt Pending of Source

28roxP_28

Interrupt Pending of Source

29roxP_29

Interrupt Pending of Source

30roxP_30

Interrupt Pending of Source

31roxP_31

Interrupt Pending of Source


RV_PLIC.IP_1 @ 0x4

Interrupt Pending

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
P_63 P_62 P_61 P_60 P_59 P_58 P_57 P_56 P_55 P_54 P_53 P_52 P_51 P_50 P_49 P_48
1514131211109876543210
P_47 P_46 P_45 P_44 P_43 P_42 P_41 P_40 P_39 P_38 P_37 P_36 P_35 P_34 P_33 P_32
BitsTypeResetNameDescription
0roxP_32

For RV_PLIC1

1roxP_33

For RV_PLIC1

2roxP_34

For RV_PLIC1

3roxP_35

For RV_PLIC1

4roxP_36

For RV_PLIC1

5roxP_37

For RV_PLIC1

6roxP_38

For RV_PLIC1

7roxP_39

For RV_PLIC1

8roxP_40

For RV_PLIC1

9roxP_41

For RV_PLIC1

10roxP_42

For RV_PLIC1

11roxP_43

For RV_PLIC1

12roxP_44

For RV_PLIC1

13roxP_45

For RV_PLIC1

14roxP_46

For RV_PLIC1

15roxP_47

For RV_PLIC1

16roxP_48

For RV_PLIC1

17roxP_49

For RV_PLIC1

18roxP_50

For RV_PLIC1

19roxP_51

For RV_PLIC1

20roxP_52

For RV_PLIC1

21roxP_53

For RV_PLIC1

22roxP_54

For RV_PLIC1

23roxP_55

For RV_PLIC1

24roxP_56

For RV_PLIC1

25roxP_57

For RV_PLIC1

26roxP_58

For RV_PLIC1

27roxP_59

For RV_PLIC1

28roxP_60

For RV_PLIC1

29roxP_61

For RV_PLIC1

30roxP_62

For RV_PLIC1

31roxP_63

For RV_PLIC1


RV_PLIC.IP_2 @ 0x8

Interrupt Pending

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
P_95 P_94 P_93 P_92 P_91 P_90 P_89 P_88 P_87 P_86 P_85 P_84 P_83 P_82 P_81 P_80
1514131211109876543210
P_79 P_78 P_77 P_76 P_75 P_74 P_73 P_72 P_71 P_70 P_69 P_68 P_67 P_66 P_65 P_64
BitsTypeResetNameDescription
0roxP_64

For RV_PLIC2

1roxP_65

For RV_PLIC2

2roxP_66

For RV_PLIC2

3roxP_67

For RV_PLIC2

4roxP_68

For RV_PLIC2

5roxP_69

For RV_PLIC2

6roxP_70

For RV_PLIC2

7roxP_71

For RV_PLIC2

8roxP_72

For RV_PLIC2

9roxP_73

For RV_PLIC2

10roxP_74

For RV_PLIC2

11roxP_75

For RV_PLIC2

12roxP_76

For RV_PLIC2

13roxP_77

For RV_PLIC2

14roxP_78

For RV_PLIC2

15roxP_79

For RV_PLIC2

16roxP_80

For RV_PLIC2

17roxP_81

For RV_PLIC2

18roxP_82

For RV_PLIC2

19roxP_83

For RV_PLIC2

20roxP_84

For RV_PLIC2

21roxP_85

For RV_PLIC2

22roxP_86

For RV_PLIC2

23roxP_87

For RV_PLIC2

24roxP_88

For RV_PLIC2

25roxP_89

For RV_PLIC2

26roxP_90

For RV_PLIC2

27roxP_91

For RV_PLIC2

28roxP_92

For RV_PLIC2

29roxP_93

For RV_PLIC2

30roxP_94

For RV_PLIC2

31roxP_95

For RV_PLIC2


RV_PLIC.IP_3 @ 0xc

Interrupt Pending

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
P_127 P_126 P_125 P_124 P_123 P_122 P_121 P_120 P_119 P_118 P_117 P_116 P_115 P_114 P_113 P_112
1514131211109876543210
P_111 P_110 P_109 P_108 P_107 P_106 P_105 P_104 P_103 P_102 P_101 P_100 P_99 P_98 P_97 P_96
BitsTypeResetNameDescription
0roxP_96

For RV_PLIC3

1roxP_97

For RV_PLIC3

2roxP_98

For RV_PLIC3

3roxP_99

For RV_PLIC3

4roxP_100

For RV_PLIC3

5roxP_101

For RV_PLIC3

6roxP_102

For RV_PLIC3

7roxP_103

For RV_PLIC3

8roxP_104

For RV_PLIC3

9roxP_105

For RV_PLIC3

10roxP_106

For RV_PLIC3

11roxP_107

For RV_PLIC3

12roxP_108

For RV_PLIC3

13roxP_109

For RV_PLIC3

14roxP_110

For RV_PLIC3

15roxP_111

For RV_PLIC3

16roxP_112

For RV_PLIC3

17roxP_113

For RV_PLIC3

18roxP_114

For RV_PLIC3

19roxP_115

For RV_PLIC3

20roxP_116

For RV_PLIC3

21roxP_117

For RV_PLIC3

22roxP_118

For RV_PLIC3

23roxP_119

For RV_PLIC3

24roxP_120

For RV_PLIC3

25roxP_121

For RV_PLIC3

26roxP_122

For RV_PLIC3

27roxP_123

For RV_PLIC3

28roxP_124

For RV_PLIC3

29roxP_125

For RV_PLIC3

30roxP_126

For RV_PLIC3

31roxP_127

For RV_PLIC3


RV_PLIC.IP_4 @ 0x10

Interrupt Pending

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
P_159 P_158 P_157 P_156 P_155 P_154 P_153 P_152 P_151 P_150 P_149 P_148 P_147 P_146 P_145 P_144
1514131211109876543210
P_143 P_142 P_141 P_140 P_139 P_138 P_137 P_136 P_135 P_134 P_133 P_132 P_131 P_130 P_129 P_128
BitsTypeResetNameDescription
0roxP_128

For RV_PLIC4

1roxP_129

For RV_PLIC4

2roxP_130

For RV_PLIC4

3roxP_131

For RV_PLIC4

4roxP_132

For RV_PLIC4

5roxP_133

For RV_PLIC4

6roxP_134

For RV_PLIC4

7roxP_135

For RV_PLIC4

8roxP_136

For RV_PLIC4

9roxP_137

For RV_PLIC4

10roxP_138

For RV_PLIC4

11roxP_139

For RV_PLIC4

12roxP_140

For RV_PLIC4

13roxP_141

For RV_PLIC4

14roxP_142

For RV_PLIC4

15roxP_143

For RV_PLIC4

16roxP_144

For RV_PLIC4

17roxP_145

For RV_PLIC4

18roxP_146

For RV_PLIC4

19roxP_147

For RV_PLIC4

20roxP_148

For RV_PLIC4

21roxP_149

For RV_PLIC4

22roxP_150

For RV_PLIC4

23roxP_151

For RV_PLIC4

24roxP_152

For RV_PLIC4

25roxP_153

For RV_PLIC4

26roxP_154

For RV_PLIC4

27roxP_155

For RV_PLIC4

28roxP_156

For RV_PLIC4

29roxP_157

For RV_PLIC4

30roxP_158

For RV_PLIC4

31roxP_159

For RV_PLIC4


RV_PLIC.IP_5 @ 0x14

Interrupt Pending

Reset default = 0x0, mask 0x7ffff
31302928272625242322212019181716
  P_178 P_177 P_176
1514131211109876543210
P_175 P_174 P_173 P_172 P_171 P_170 P_169 P_168 P_167 P_166 P_165 P_164 P_163 P_162 P_161 P_160
BitsTypeResetNameDescription
0roxP_160

For RV_PLIC5

1roxP_161

For RV_PLIC5

2roxP_162

For RV_PLIC5

3roxP_163

For RV_PLIC5

4roxP_164

For RV_PLIC5

5roxP_165

For RV_PLIC5

6roxP_166

For RV_PLIC5

7roxP_167

For RV_PLIC5

8roxP_168

For RV_PLIC5

9roxP_169

For RV_PLIC5

10roxP_170

For RV_PLIC5

11roxP_171

For RV_PLIC5

12roxP_172

For RV_PLIC5

13roxP_173

For RV_PLIC5

14roxP_174

For RV_PLIC5

15roxP_175

For RV_PLIC5

16roxP_176

For RV_PLIC5

17roxP_177

For RV_PLIC5

18roxP_178

For RV_PLIC5


RV_PLIC.LE_0 @ 0x18

Interrupt Source mode. 0: Level, 1: Edge-triggered

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
LE_31 LE_30 LE_29 LE_28 LE_27 LE_26 LE_25 LE_24 LE_23 LE_22 LE_21 LE_20 LE_19 LE_18 LE_17 LE_16
1514131211109876543210
LE_15 LE_14 LE_13 LE_12 LE_11 LE_10 LE_9 LE_8 LE_7 LE_6 LE_5 LE_4 LE_3 LE_2 LE_1 LE_0
BitsTypeResetNameDescription
0rwxLE_0

L0E1

1rwxLE_1

L0E1

2rwxLE_2

L0E1

3rwxLE_3

L0E1

4rwxLE_4

L0E1

5rwxLE_5

L0E1

6rwxLE_6

L0E1

7rwxLE_7

L0E1

8rwxLE_8

L0E1

9rwxLE_9

L0E1

10rwxLE_10

L0E1

11rwxLE_11

L0E1

12rwxLE_12

L0E1

13rwxLE_13

L0E1

14rwxLE_14

L0E1

15rwxLE_15

L0E1

16rwxLE_16

L0E1

17rwxLE_17

L0E1

18rwxLE_18

L0E1

19rwxLE_19

L0E1

20rwxLE_20

L0E1

21rwxLE_21

L0E1

22rwxLE_22

L0E1

23rwxLE_23

L0E1

24rwxLE_24

L0E1

25rwxLE_25

L0E1

26rwxLE_26

L0E1

27rwxLE_27

L0E1

28rwxLE_28

L0E1

29rwxLE_29

L0E1

30rwxLE_30

L0E1

31rwxLE_31

L0E1


RV_PLIC.LE_1 @ 0x1c

Interrupt Source mode. 0: Level, 1: Edge-triggered

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
LE_63 LE_62 LE_61 LE_60 LE_59 LE_58 LE_57 LE_56 LE_55 LE_54 LE_53 LE_52 LE_51 LE_50 LE_49 LE_48
1514131211109876543210
LE_47 LE_46 LE_45 LE_44 LE_43 LE_42 LE_41 LE_40 LE_39 LE_38 LE_37 LE_36 LE_35 LE_34 LE_33 LE_32
BitsTypeResetNameDescription
0rwxLE_32

For RV_PLIC1

1rwxLE_33

For RV_PLIC1

2rwxLE_34

For RV_PLIC1

3rwxLE_35

For RV_PLIC1

4rwxLE_36

For RV_PLIC1

5rwxLE_37

For RV_PLIC1

6rwxLE_38

For RV_PLIC1

7rwxLE_39

For RV_PLIC1

8rwxLE_40

For RV_PLIC1

9rwxLE_41

For RV_PLIC1

10rwxLE_42

For RV_PLIC1

11rwxLE_43

For RV_PLIC1

12rwxLE_44

For RV_PLIC1

13rwxLE_45

For RV_PLIC1

14rwxLE_46

For RV_PLIC1

15rwxLE_47

For RV_PLIC1

16rwxLE_48

For RV_PLIC1

17rwxLE_49

For RV_PLIC1

18rwxLE_50

For RV_PLIC1

19rwxLE_51

For RV_PLIC1

20rwxLE_52

For RV_PLIC1

21rwxLE_53

For RV_PLIC1

22rwxLE_54

For RV_PLIC1

23rwxLE_55

For RV_PLIC1

24rwxLE_56

For RV_PLIC1

25rwxLE_57

For RV_PLIC1

26rwxLE_58

For RV_PLIC1

27rwxLE_59

For RV_PLIC1

28rwxLE_60

For RV_PLIC1

29rwxLE_61

For RV_PLIC1

30rwxLE_62

For RV_PLIC1

31rwxLE_63

For RV_PLIC1


RV_PLIC.LE_2 @ 0x20

Interrupt Source mode. 0: Level, 1: Edge-triggered

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
LE_95 LE_94 LE_93 LE_92 LE_91 LE_90 LE_89 LE_88 LE_87 LE_86 LE_85 LE_84 LE_83 LE_82 LE_81 LE_80
1514131211109876543210
LE_79 LE_78 LE_77 LE_76 LE_75 LE_74 LE_73 LE_72 LE_71 LE_70 LE_69 LE_68 LE_67 LE_66 LE_65 LE_64
BitsTypeResetNameDescription
0rwxLE_64

For RV_PLIC2

1rwxLE_65

For RV_PLIC2

2rwxLE_66

For RV_PLIC2

3rwxLE_67

For RV_PLIC2

4rwxLE_68

For RV_PLIC2

5rwxLE_69

For RV_PLIC2

6rwxLE_70

For RV_PLIC2

7rwxLE_71

For RV_PLIC2

8rwxLE_72

For RV_PLIC2

9rwxLE_73

For RV_PLIC2

10rwxLE_74

For RV_PLIC2

11rwxLE_75

For RV_PLIC2

12rwxLE_76

For RV_PLIC2

13rwxLE_77

For RV_PLIC2

14rwxLE_78

For RV_PLIC2

15rwxLE_79

For RV_PLIC2

16rwxLE_80

For RV_PLIC2

17rwxLE_81

For RV_PLIC2

18rwxLE_82

For RV_PLIC2

19rwxLE_83

For RV_PLIC2

20rwxLE_84

For RV_PLIC2

21rwxLE_85

For RV_PLIC2

22rwxLE_86

For RV_PLIC2

23rwxLE_87

For RV_PLIC2

24rwxLE_88

For RV_PLIC2

25rwxLE_89

For RV_PLIC2

26rwxLE_90

For RV_PLIC2

27rwxLE_91

For RV_PLIC2

28rwxLE_92

For RV_PLIC2

29rwxLE_93

For RV_PLIC2

30rwxLE_94

For RV_PLIC2

31rwxLE_95

For RV_PLIC2


RV_PLIC.LE_3 @ 0x24

Interrupt Source mode. 0: Level, 1: Edge-triggered

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
LE_127 LE_126 LE_125 LE_124 LE_123 LE_122 LE_121 LE_120 LE_119 LE_118 LE_117 LE_116 LE_115 LE_114 LE_113 LE_112
1514131211109876543210
LE_111 LE_110 LE_109 LE_108 LE_107 LE_106 LE_105 LE_104 LE_103 LE_102 LE_101 LE_100 LE_99 LE_98 LE_97 LE_96
BitsTypeResetNameDescription
0rwxLE_96

For RV_PLIC3

1rwxLE_97

For RV_PLIC3

2rwxLE_98

For RV_PLIC3

3rwxLE_99

For RV_PLIC3

4rwxLE_100

For RV_PLIC3

5rwxLE_101

For RV_PLIC3

6rwxLE_102

For RV_PLIC3

7rwxLE_103

For RV_PLIC3

8rwxLE_104

For RV_PLIC3

9rwxLE_105

For RV_PLIC3

10rwxLE_106

For RV_PLIC3

11rwxLE_107

For RV_PLIC3

12rwxLE_108

For RV_PLIC3

13rwxLE_109

For RV_PLIC3

14rwxLE_110

For RV_PLIC3

15rwxLE_111

For RV_PLIC3

16rwxLE_112

For RV_PLIC3

17rwxLE_113

For RV_PLIC3

18rwxLE_114

For RV_PLIC3

19rwxLE_115

For RV_PLIC3

20rwxLE_116

For RV_PLIC3

21rwxLE_117

For RV_PLIC3

22rwxLE_118

For RV_PLIC3

23rwxLE_119

For RV_PLIC3

24rwxLE_120

For RV_PLIC3

25rwxLE_121

For RV_PLIC3

26rwxLE_122

For RV_PLIC3

27rwxLE_123

For RV_PLIC3

28rwxLE_124

For RV_PLIC3

29rwxLE_125

For RV_PLIC3

30rwxLE_126

For RV_PLIC3

31rwxLE_127

For RV_PLIC3


RV_PLIC.LE_4 @ 0x28

Interrupt Source mode. 0: Level, 1: Edge-triggered

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
LE_159 LE_158 LE_157 LE_156 LE_155 LE_154 LE_153 LE_152 LE_151 LE_150 LE_149 LE_148 LE_147 LE_146 LE_145 LE_144
1514131211109876543210
LE_143 LE_142 LE_141 LE_140 LE_139 LE_138 LE_137 LE_136 LE_135 LE_134 LE_133 LE_132 LE_131 LE_130 LE_129 LE_128
BitsTypeResetNameDescription
0rwxLE_128

For RV_PLIC4

1rwxLE_129

For RV_PLIC4

2rwxLE_130

For RV_PLIC4

3rwxLE_131

For RV_PLIC4

4rwxLE_132

For RV_PLIC4

5rwxLE_133

For RV_PLIC4

6rwxLE_134

For RV_PLIC4

7rwxLE_135

For RV_PLIC4

8rwxLE_136

For RV_PLIC4

9rwxLE_137

For RV_PLIC4

10rwxLE_138

For RV_PLIC4

11rwxLE_139

For RV_PLIC4

12rwxLE_140

For RV_PLIC4

13rwxLE_141

For RV_PLIC4

14rwxLE_142

For RV_PLIC4

15rwxLE_143

For RV_PLIC4

16rwxLE_144

For RV_PLIC4

17rwxLE_145

For RV_PLIC4

18rwxLE_146

For RV_PLIC4

19rwxLE_147

For RV_PLIC4

20rwxLE_148

For RV_PLIC4

21rwxLE_149

For RV_PLIC4

22rwxLE_150

For RV_PLIC4

23rwxLE_151

For RV_PLIC4

24rwxLE_152

For RV_PLIC4

25rwxLE_153

For RV_PLIC4

26rwxLE_154

For RV_PLIC4

27rwxLE_155

For RV_PLIC4

28rwxLE_156

For RV_PLIC4

29rwxLE_157

For RV_PLIC4

30rwxLE_158

For RV_PLIC4

31rwxLE_159

For RV_PLIC4


RV_PLIC.LE_5 @ 0x2c

Interrupt Source mode. 0: Level, 1: Edge-triggered

Reset default = 0x0, mask 0x7ffff
31302928272625242322212019181716
  LE_178 LE_177 LE_176
1514131211109876543210
LE_175 LE_174 LE_173 LE_172 LE_171 LE_170 LE_169 LE_168 LE_167 LE_166 LE_165 LE_164 LE_163 LE_162 LE_161 LE_160
BitsTypeResetNameDescription
0rwxLE_160

For RV_PLIC5

1rwxLE_161

For RV_PLIC5

2rwxLE_162

For RV_PLIC5

3rwxLE_163

For RV_PLIC5

4rwxLE_164

For RV_PLIC5

5rwxLE_165

For RV_PLIC5

6rwxLE_166

For RV_PLIC5

7rwxLE_167

For RV_PLIC5

8rwxLE_168

For RV_PLIC5

9rwxLE_169

For RV_PLIC5

10rwxLE_170

For RV_PLIC5

11rwxLE_171

For RV_PLIC5

12rwxLE_172

For RV_PLIC5

13rwxLE_173

For RV_PLIC5

14rwxLE_174

For RV_PLIC5

15rwxLE_175

For RV_PLIC5

16rwxLE_176

For RV_PLIC5

17rwxLE_177

For RV_PLIC5

18rwxLE_178

For RV_PLIC5


RV_PLIC.PRIO0 @ 0x30

Interrupt Source 0 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO0
BitsTypeResetNameDescription
1:0rwxPRIO0

RV_PLIC.PRIO1 @ 0x34

Interrupt Source 1 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO1
BitsTypeResetNameDescription
1:0rwxPRIO1

RV_PLIC.PRIO2 @ 0x38

Interrupt Source 2 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO2
BitsTypeResetNameDescription
1:0rwxPRIO2

RV_PLIC.PRIO3 @ 0x3c

Interrupt Source 3 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO3
BitsTypeResetNameDescription
1:0rwxPRIO3

RV_PLIC.PRIO4 @ 0x40

Interrupt Source 4 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO4
BitsTypeResetNameDescription
1:0rwxPRIO4

RV_PLIC.PRIO5 @ 0x44

Interrupt Source 5 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO5
BitsTypeResetNameDescription
1:0rwxPRIO5

RV_PLIC.PRIO6 @ 0x48

Interrupt Source 6 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO6
BitsTypeResetNameDescription
1:0rwxPRIO6

RV_PLIC.PRIO7 @ 0x4c

Interrupt Source 7 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO7
BitsTypeResetNameDescription
1:0rwxPRIO7

RV_PLIC.PRIO8 @ 0x50

Interrupt Source 8 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO8
BitsTypeResetNameDescription
1:0rwxPRIO8

RV_PLIC.PRIO9 @ 0x54

Interrupt Source 9 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO9
BitsTypeResetNameDescription
1:0rwxPRIO9

RV_PLIC.PRIO10 @ 0x58

Interrupt Source 10 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO10
BitsTypeResetNameDescription
1:0rwxPRIO10

RV_PLIC.PRIO11 @ 0x5c

Interrupt Source 11 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO11
BitsTypeResetNameDescription
1:0rwxPRIO11

RV_PLIC.PRIO12 @ 0x60

Interrupt Source 12 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO12
BitsTypeResetNameDescription
1:0rwxPRIO12

RV_PLIC.PRIO13 @ 0x64

Interrupt Source 13 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO13
BitsTypeResetNameDescription
1:0rwxPRIO13

RV_PLIC.PRIO14 @ 0x68

Interrupt Source 14 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO14
BitsTypeResetNameDescription
1:0rwxPRIO14

RV_PLIC.PRIO15 @ 0x6c

Interrupt Source 15 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO15
BitsTypeResetNameDescription
1:0rwxPRIO15

RV_PLIC.PRIO16 @ 0x70

Interrupt Source 16 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO16
BitsTypeResetNameDescription
1:0rwxPRIO16

RV_PLIC.PRIO17 @ 0x74

Interrupt Source 17 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO17
BitsTypeResetNameDescription
1:0rwxPRIO17

RV_PLIC.PRIO18 @ 0x78

Interrupt Source 18 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO18
BitsTypeResetNameDescription
1:0rwxPRIO18

RV_PLIC.PRIO19 @ 0x7c

Interrupt Source 19 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO19
BitsTypeResetNameDescription
1:0rwxPRIO19

RV_PLIC.PRIO20 @ 0x80

Interrupt Source 20 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO20
BitsTypeResetNameDescription
1:0rwxPRIO20

RV_PLIC.PRIO21 @ 0x84

Interrupt Source 21 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO21
BitsTypeResetNameDescription
1:0rwxPRIO21

RV_PLIC.PRIO22 @ 0x88

Interrupt Source 22 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO22
BitsTypeResetNameDescription
1:0rwxPRIO22

RV_PLIC.PRIO23 @ 0x8c

Interrupt Source 23 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO23
BitsTypeResetNameDescription
1:0rwxPRIO23

RV_PLIC.PRIO24 @ 0x90

Interrupt Source 24 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO24
BitsTypeResetNameDescription
1:0rwxPRIO24

RV_PLIC.PRIO25 @ 0x94

Interrupt Source 25 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO25
BitsTypeResetNameDescription
1:0rwxPRIO25

RV_PLIC.PRIO26 @ 0x98

Interrupt Source 26 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO26
BitsTypeResetNameDescription
1:0rwxPRIO26

RV_PLIC.PRIO27 @ 0x9c

Interrupt Source 27 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO27
BitsTypeResetNameDescription
1:0rwxPRIO27

RV_PLIC.PRIO28 @ 0xa0

Interrupt Source 28 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO28
BitsTypeResetNameDescription
1:0rwxPRIO28

RV_PLIC.PRIO29 @ 0xa4

Interrupt Source 29 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO29
BitsTypeResetNameDescription
1:0rwxPRIO29

RV_PLIC.PRIO30 @ 0xa8

Interrupt Source 30 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO30
BitsTypeResetNameDescription
1:0rwxPRIO30

RV_PLIC.PRIO31 @ 0xac

Interrupt Source 31 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO31
BitsTypeResetNameDescription
1:0rwxPRIO31

RV_PLIC.PRIO32 @ 0xb0

Interrupt Source 32 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO32
BitsTypeResetNameDescription
1:0rwxPRIO32

RV_PLIC.PRIO33 @ 0xb4

Interrupt Source 33 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO33
BitsTypeResetNameDescription
1:0rwxPRIO33

RV_PLIC.PRIO34 @ 0xb8

Interrupt Source 34 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO34
BitsTypeResetNameDescription
1:0rwxPRIO34

RV_PLIC.PRIO35 @ 0xbc

Interrupt Source 35 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO35
BitsTypeResetNameDescription
1:0rwxPRIO35

RV_PLIC.PRIO36 @ 0xc0

Interrupt Source 36 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO36
BitsTypeResetNameDescription
1:0rwxPRIO36

RV_PLIC.PRIO37 @ 0xc4

Interrupt Source 37 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO37
BitsTypeResetNameDescription
1:0rwxPRIO37

RV_PLIC.PRIO38 @ 0xc8

Interrupt Source 38 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO38
BitsTypeResetNameDescription
1:0rwxPRIO38

RV_PLIC.PRIO39 @ 0xcc

Interrupt Source 39 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO39
BitsTypeResetNameDescription
1:0rwxPRIO39

RV_PLIC.PRIO40 @ 0xd0

Interrupt Source 40 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO40
BitsTypeResetNameDescription
1:0rwxPRIO40

RV_PLIC.PRIO41 @ 0xd4

Interrupt Source 41 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO41
BitsTypeResetNameDescription
1:0rwxPRIO41

RV_PLIC.PRIO42 @ 0xd8

Interrupt Source 42 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO42
BitsTypeResetNameDescription
1:0rwxPRIO42

RV_PLIC.PRIO43 @ 0xdc

Interrupt Source 43 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO43
BitsTypeResetNameDescription
1:0rwxPRIO43

RV_PLIC.PRIO44 @ 0xe0

Interrupt Source 44 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO44
BitsTypeResetNameDescription
1:0rwxPRIO44

RV_PLIC.PRIO45 @ 0xe4

Interrupt Source 45 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO45
BitsTypeResetNameDescription
1:0rwxPRIO45

RV_PLIC.PRIO46 @ 0xe8

Interrupt Source 46 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO46
BitsTypeResetNameDescription
1:0rwxPRIO46

RV_PLIC.PRIO47 @ 0xec

Interrupt Source 47 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO47
BitsTypeResetNameDescription
1:0rwxPRIO47

RV_PLIC.PRIO48 @ 0xf0

Interrupt Source 48 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO48
BitsTypeResetNameDescription
1:0rwxPRIO48

RV_PLIC.PRIO49 @ 0xf4

Interrupt Source 49 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO49
BitsTypeResetNameDescription
1:0rwxPRIO49

RV_PLIC.PRIO50 @ 0xf8

Interrupt Source 50 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO50
BitsTypeResetNameDescription
1:0rwxPRIO50

RV_PLIC.PRIO51 @ 0xfc

Interrupt Source 51 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO51
BitsTypeResetNameDescription
1:0rwxPRIO51

RV_PLIC.PRIO52 @ 0x100

Interrupt Source 52 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO52
BitsTypeResetNameDescription
1:0rwxPRIO52

RV_PLIC.PRIO53 @ 0x104

Interrupt Source 53 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO53
BitsTypeResetNameDescription
1:0rwxPRIO53

RV_PLIC.PRIO54 @ 0x108

Interrupt Source 54 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO54
BitsTypeResetNameDescription
1:0rwxPRIO54

RV_PLIC.PRIO55 @ 0x10c

Interrupt Source 55 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO55
BitsTypeResetNameDescription
1:0rwxPRIO55

RV_PLIC.PRIO56 @ 0x110

Interrupt Source 56 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO56
BitsTypeResetNameDescription
1:0rwxPRIO56

RV_PLIC.PRIO57 @ 0x114

Interrupt Source 57 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO57
BitsTypeResetNameDescription
1:0rwxPRIO57

RV_PLIC.PRIO58 @ 0x118

Interrupt Source 58 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO58
BitsTypeResetNameDescription
1:0rwxPRIO58

RV_PLIC.PRIO59 @ 0x11c

Interrupt Source 59 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO59
BitsTypeResetNameDescription
1:0rwxPRIO59

RV_PLIC.PRIO60 @ 0x120

Interrupt Source 60 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO60
BitsTypeResetNameDescription
1:0rwxPRIO60

RV_PLIC.PRIO61 @ 0x124

Interrupt Source 61 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO61
BitsTypeResetNameDescription
1:0rwxPRIO61

RV_PLIC.PRIO62 @ 0x128

Interrupt Source 62 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO62
BitsTypeResetNameDescription
1:0rwxPRIO62

RV_PLIC.PRIO63 @ 0x12c

Interrupt Source 63 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO63
BitsTypeResetNameDescription
1:0rwxPRIO63

RV_PLIC.PRIO64 @ 0x130

Interrupt Source 64 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO64
BitsTypeResetNameDescription
1:0rwxPRIO64

RV_PLIC.PRIO65 @ 0x134

Interrupt Source 65 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO65
BitsTypeResetNameDescription
1:0rwxPRIO65

RV_PLIC.PRIO66 @ 0x138

Interrupt Source 66 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO66
BitsTypeResetNameDescription
1:0rwxPRIO66

RV_PLIC.PRIO67 @ 0x13c

Interrupt Source 67 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO67
BitsTypeResetNameDescription
1:0rwxPRIO67

RV_PLIC.PRIO68 @ 0x140

Interrupt Source 68 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO68
BitsTypeResetNameDescription
1:0rwxPRIO68

RV_PLIC.PRIO69 @ 0x144

Interrupt Source 69 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO69
BitsTypeResetNameDescription
1:0rwxPRIO69

RV_PLIC.PRIO70 @ 0x148

Interrupt Source 70 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO70
BitsTypeResetNameDescription
1:0rwxPRIO70

RV_PLIC.PRIO71 @ 0x14c

Interrupt Source 71 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO71
BitsTypeResetNameDescription
1:0rwxPRIO71

RV_PLIC.PRIO72 @ 0x150

Interrupt Source 72 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO72
BitsTypeResetNameDescription
1:0rwxPRIO72

RV_PLIC.PRIO73 @ 0x154

Interrupt Source 73 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO73
BitsTypeResetNameDescription
1:0rwxPRIO73

RV_PLIC.PRIO74 @ 0x158

Interrupt Source 74 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO74
BitsTypeResetNameDescription
1:0rwxPRIO74

RV_PLIC.PRIO75 @ 0x15c

Interrupt Source 75 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO75
BitsTypeResetNameDescription
1:0rwxPRIO75

RV_PLIC.PRIO76 @ 0x160

Interrupt Source 76 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO76
BitsTypeResetNameDescription
1:0rwxPRIO76

RV_PLIC.PRIO77 @ 0x164

Interrupt Source 77 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO77
BitsTypeResetNameDescription
1:0rwxPRIO77

RV_PLIC.PRIO78 @ 0x168

Interrupt Source 78 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO78
BitsTypeResetNameDescription
1:0rwxPRIO78

RV_PLIC.PRIO79 @ 0x16c

Interrupt Source 79 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO79
BitsTypeResetNameDescription
1:0rwxPRIO79

RV_PLIC.PRIO80 @ 0x170

Interrupt Source 80 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO80
BitsTypeResetNameDescription
1:0rwxPRIO80

RV_PLIC.PRIO81 @ 0x174

Interrupt Source 81 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO81
BitsTypeResetNameDescription
1:0rwxPRIO81

RV_PLIC.PRIO82 @ 0x178

Interrupt Source 82 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO82
BitsTypeResetNameDescription
1:0rwxPRIO82

RV_PLIC.PRIO83 @ 0x17c

Interrupt Source 83 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO83
BitsTypeResetNameDescription
1:0rwxPRIO83

RV_PLIC.PRIO84 @ 0x180

Interrupt Source 84 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO84
BitsTypeResetNameDescription
1:0rwxPRIO84

RV_PLIC.PRIO85 @ 0x184

Interrupt Source 85 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO85
BitsTypeResetNameDescription
1:0rwxPRIO85

RV_PLIC.PRIO86 @ 0x188

Interrupt Source 86 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO86
BitsTypeResetNameDescription
1:0rwxPRIO86

RV_PLIC.PRIO87 @ 0x18c

Interrupt Source 87 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO87
BitsTypeResetNameDescription
1:0rwxPRIO87

RV_PLIC.PRIO88 @ 0x190

Interrupt Source 88 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO88
BitsTypeResetNameDescription
1:0rwxPRIO88

RV_PLIC.PRIO89 @ 0x194

Interrupt Source 89 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO89
BitsTypeResetNameDescription
1:0rwxPRIO89

RV_PLIC.PRIO90 @ 0x198

Interrupt Source 90 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO90
BitsTypeResetNameDescription
1:0rwxPRIO90

RV_PLIC.PRIO91 @ 0x19c

Interrupt Source 91 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO91
BitsTypeResetNameDescription
1:0rwxPRIO91

RV_PLIC.PRIO92 @ 0x1a0

Interrupt Source 92 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO92
BitsTypeResetNameDescription
1:0rwxPRIO92

RV_PLIC.PRIO93 @ 0x1a4

Interrupt Source 93 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO93
BitsTypeResetNameDescription
1:0rwxPRIO93

RV_PLIC.PRIO94 @ 0x1a8

Interrupt Source 94 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO94
BitsTypeResetNameDescription
1:0rwxPRIO94

RV_PLIC.PRIO95 @ 0x1ac

Interrupt Source 95 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO95
BitsTypeResetNameDescription
1:0rwxPRIO95

RV_PLIC.PRIO96 @ 0x1b0

Interrupt Source 96 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO96
BitsTypeResetNameDescription
1:0rwxPRIO96

RV_PLIC.PRIO97 @ 0x1b4

Interrupt Source 97 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO97
BitsTypeResetNameDescription
1:0rwxPRIO97

RV_PLIC.PRIO98 @ 0x1b8

Interrupt Source 98 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO98
BitsTypeResetNameDescription
1:0rwxPRIO98

RV_PLIC.PRIO99 @ 0x1bc

Interrupt Source 99 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO99
BitsTypeResetNameDescription
1:0rwxPRIO99

RV_PLIC.PRIO100 @ 0x1c0

Interrupt Source 100 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO100
BitsTypeResetNameDescription
1:0rwxPRIO100

RV_PLIC.PRIO101 @ 0x1c4

Interrupt Source 101 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO101
BitsTypeResetNameDescription
1:0rwxPRIO101

RV_PLIC.PRIO102 @ 0x1c8

Interrupt Source 102 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO102
BitsTypeResetNameDescription
1:0rwxPRIO102

RV_PLIC.PRIO103 @ 0x1cc

Interrupt Source 103 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO103
BitsTypeResetNameDescription
1:0rwxPRIO103

RV_PLIC.PRIO104 @ 0x1d0

Interrupt Source 104 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO104
BitsTypeResetNameDescription
1:0rwxPRIO104

RV_PLIC.PRIO105 @ 0x1d4

Interrupt Source 105 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO105
BitsTypeResetNameDescription
1:0rwxPRIO105

RV_PLIC.PRIO106 @ 0x1d8

Interrupt Source 106 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO106
BitsTypeResetNameDescription
1:0rwxPRIO106

RV_PLIC.PRIO107 @ 0x1dc

Interrupt Source 107 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO107
BitsTypeResetNameDescription
1:0rwxPRIO107

RV_PLIC.PRIO108 @ 0x1e0

Interrupt Source 108 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO108
BitsTypeResetNameDescription
1:0rwxPRIO108

RV_PLIC.PRIO109 @ 0x1e4

Interrupt Source 109 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO109
BitsTypeResetNameDescription
1:0rwxPRIO109

RV_PLIC.PRIO110 @ 0x1e8

Interrupt Source 110 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO110
BitsTypeResetNameDescription
1:0rwxPRIO110

RV_PLIC.PRIO111 @ 0x1ec

Interrupt Source 111 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO111
BitsTypeResetNameDescription
1:0rwxPRIO111

RV_PLIC.PRIO112 @ 0x1f0

Interrupt Source 112 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO112
BitsTypeResetNameDescription
1:0rwxPRIO112

RV_PLIC.PRIO113 @ 0x1f4

Interrupt Source 113 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO113
BitsTypeResetNameDescription
1:0rwxPRIO113

RV_PLIC.PRIO114 @ 0x1f8

Interrupt Source 114 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO114
BitsTypeResetNameDescription
1:0rwxPRIO114

RV_PLIC.PRIO115 @ 0x1fc

Interrupt Source 115 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO115
BitsTypeResetNameDescription
1:0rwxPRIO115

RV_PLIC.PRIO116 @ 0x200

Interrupt Source 116 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO116
BitsTypeResetNameDescription
1:0rwxPRIO116

RV_PLIC.PRIO117 @ 0x204

Interrupt Source 117 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO117
BitsTypeResetNameDescription
1:0rwxPRIO117

RV_PLIC.PRIO118 @ 0x208

Interrupt Source 118 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO118
BitsTypeResetNameDescription
1:0rwxPRIO118

RV_PLIC.PRIO119 @ 0x20c

Interrupt Source 119 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO119
BitsTypeResetNameDescription
1:0rwxPRIO119

RV_PLIC.PRIO120 @ 0x210

Interrupt Source 120 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO120
BitsTypeResetNameDescription
1:0rwxPRIO120

RV_PLIC.PRIO121 @ 0x214

Interrupt Source 121 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO121
BitsTypeResetNameDescription
1:0rwxPRIO121

RV_PLIC.PRIO122 @ 0x218

Interrupt Source 122 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO122
BitsTypeResetNameDescription
1:0rwxPRIO122

RV_PLIC.PRIO123 @ 0x21c

Interrupt Source 123 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO123
BitsTypeResetNameDescription
1:0rwxPRIO123

RV_PLIC.PRIO124 @ 0x220

Interrupt Source 124 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO124
BitsTypeResetNameDescription
1:0rwxPRIO124

RV_PLIC.PRIO125 @ 0x224

Interrupt Source 125 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO125
BitsTypeResetNameDescription
1:0rwxPRIO125

RV_PLIC.PRIO126 @ 0x228

Interrupt Source 126 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO126
BitsTypeResetNameDescription
1:0rwxPRIO126

RV_PLIC.PRIO127 @ 0x22c

Interrupt Source 127 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO127
BitsTypeResetNameDescription
1:0rwxPRIO127

RV_PLIC.PRIO128 @ 0x230

Interrupt Source 128 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO128
BitsTypeResetNameDescription
1:0rwxPRIO128

RV_PLIC.PRIO129 @ 0x234

Interrupt Source 129 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO129
BitsTypeResetNameDescription
1:0rwxPRIO129

RV_PLIC.PRIO130 @ 0x238

Interrupt Source 130 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO130
BitsTypeResetNameDescription
1:0rwxPRIO130

RV_PLIC.PRIO131 @ 0x23c

Interrupt Source 131 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO131
BitsTypeResetNameDescription
1:0rwxPRIO131

RV_PLIC.PRIO132 @ 0x240

Interrupt Source 132 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO132
BitsTypeResetNameDescription
1:0rwxPRIO132

RV_PLIC.PRIO133 @ 0x244

Interrupt Source 133 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO133
BitsTypeResetNameDescription
1:0rwxPRIO133

RV_PLIC.PRIO134 @ 0x248

Interrupt Source 134 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO134
BitsTypeResetNameDescription
1:0rwxPRIO134

RV_PLIC.PRIO135 @ 0x24c

Interrupt Source 135 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO135
BitsTypeResetNameDescription
1:0rwxPRIO135

RV_PLIC.PRIO136 @ 0x250

Interrupt Source 136 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO136
BitsTypeResetNameDescription
1:0rwxPRIO136

RV_PLIC.PRIO137 @ 0x254

Interrupt Source 137 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO137
BitsTypeResetNameDescription
1:0rwxPRIO137

RV_PLIC.PRIO138 @ 0x258

Interrupt Source 138 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO138
BitsTypeResetNameDescription
1:0rwxPRIO138

RV_PLIC.PRIO139 @ 0x25c

Interrupt Source 139 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO139
BitsTypeResetNameDescription
1:0rwxPRIO139

RV_PLIC.PRIO140 @ 0x260

Interrupt Source 140 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO140
BitsTypeResetNameDescription
1:0rwxPRIO140

RV_PLIC.PRIO141 @ 0x264

Interrupt Source 141 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO141
BitsTypeResetNameDescription
1:0rwxPRIO141

RV_PLIC.PRIO142 @ 0x268

Interrupt Source 142 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO142
BitsTypeResetNameDescription
1:0rwxPRIO142

RV_PLIC.PRIO143 @ 0x26c

Interrupt Source 143 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO143
BitsTypeResetNameDescription
1:0rwxPRIO143

RV_PLIC.PRIO144 @ 0x270

Interrupt Source 144 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO144
BitsTypeResetNameDescription
1:0rwxPRIO144

RV_PLIC.PRIO145 @ 0x274

Interrupt Source 145 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO145
BitsTypeResetNameDescription
1:0rwxPRIO145

RV_PLIC.PRIO146 @ 0x278

Interrupt Source 146 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO146
BitsTypeResetNameDescription
1:0rwxPRIO146

RV_PLIC.PRIO147 @ 0x27c

Interrupt Source 147 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO147
BitsTypeResetNameDescription
1:0rwxPRIO147

RV_PLIC.PRIO148 @ 0x280

Interrupt Source 148 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO148
BitsTypeResetNameDescription
1:0rwxPRIO148

RV_PLIC.PRIO149 @ 0x284

Interrupt Source 149 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO149
BitsTypeResetNameDescription
1:0rwxPRIO149

RV_PLIC.PRIO150 @ 0x288

Interrupt Source 150 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO150
BitsTypeResetNameDescription
1:0rwxPRIO150

RV_PLIC.PRIO151 @ 0x28c

Interrupt Source 151 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO151
BitsTypeResetNameDescription
1:0rwxPRIO151

RV_PLIC.PRIO152 @ 0x290

Interrupt Source 152 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO152
BitsTypeResetNameDescription
1:0rwxPRIO152

RV_PLIC.PRIO153 @ 0x294

Interrupt Source 153 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO153
BitsTypeResetNameDescription
1:0rwxPRIO153

RV_PLIC.PRIO154 @ 0x298

Interrupt Source 154 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO154
BitsTypeResetNameDescription
1:0rwxPRIO154

RV_PLIC.PRIO155 @ 0x29c

Interrupt Source 155 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO155
BitsTypeResetNameDescription
1:0rwxPRIO155

RV_PLIC.PRIO156 @ 0x2a0

Interrupt Source 156 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO156
BitsTypeResetNameDescription
1:0rwxPRIO156

RV_PLIC.PRIO157 @ 0x2a4

Interrupt Source 157 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO157
BitsTypeResetNameDescription
1:0rwxPRIO157

RV_PLIC.PRIO158 @ 0x2a8

Interrupt Source 158 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO158
BitsTypeResetNameDescription
1:0rwxPRIO158

RV_PLIC.PRIO159 @ 0x2ac

Interrupt Source 159 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO159
BitsTypeResetNameDescription
1:0rwxPRIO159

RV_PLIC.PRIO160 @ 0x2b0

Interrupt Source 160 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO160
BitsTypeResetNameDescription
1:0rwxPRIO160

RV_PLIC.PRIO161 @ 0x2b4

Interrupt Source 161 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO161
BitsTypeResetNameDescription
1:0rwxPRIO161

RV_PLIC.PRIO162 @ 0x2b8

Interrupt Source 162 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO162
BitsTypeResetNameDescription
1:0rwxPRIO162

RV_PLIC.PRIO163 @ 0x2bc

Interrupt Source 163 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO163
BitsTypeResetNameDescription
1:0rwxPRIO163

RV_PLIC.PRIO164 @ 0x2c0

Interrupt Source 164 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO164
BitsTypeResetNameDescription
1:0rwxPRIO164

RV_PLIC.PRIO165 @ 0x2c4

Interrupt Source 165 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO165
BitsTypeResetNameDescription
1:0rwxPRIO165

RV_PLIC.PRIO166 @ 0x2c8

Interrupt Source 166 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO166
BitsTypeResetNameDescription
1:0rwxPRIO166

RV_PLIC.PRIO167 @ 0x2cc

Interrupt Source 167 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO167
BitsTypeResetNameDescription
1:0rwxPRIO167

RV_PLIC.PRIO168 @ 0x2d0

Interrupt Source 168 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO168
BitsTypeResetNameDescription
1:0rwxPRIO168

RV_PLIC.PRIO169 @ 0x2d4

Interrupt Source 169 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO169
BitsTypeResetNameDescription
1:0rwxPRIO169

RV_PLIC.PRIO170 @ 0x2d8

Interrupt Source 170 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO170
BitsTypeResetNameDescription
1:0rwxPRIO170

RV_PLIC.PRIO171 @ 0x2dc

Interrupt Source 171 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO171
BitsTypeResetNameDescription
1:0rwxPRIO171

RV_PLIC.PRIO172 @ 0x2e0

Interrupt Source 172 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO172
BitsTypeResetNameDescription
1:0rwxPRIO172

RV_PLIC.PRIO173 @ 0x2e4

Interrupt Source 173 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO173
BitsTypeResetNameDescription
1:0rwxPRIO173

RV_PLIC.PRIO174 @ 0x2e8

Interrupt Source 174 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO174
BitsTypeResetNameDescription
1:0rwxPRIO174

RV_PLIC.PRIO175 @ 0x2ec

Interrupt Source 175 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO175
BitsTypeResetNameDescription
1:0rwxPRIO175

RV_PLIC.PRIO176 @ 0x2f0

Interrupt Source 176 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO176
BitsTypeResetNameDescription
1:0rwxPRIO176

RV_PLIC.PRIO177 @ 0x2f4

Interrupt Source 177 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO177
BitsTypeResetNameDescription
1:0rwxPRIO177

RV_PLIC.PRIO178 @ 0x2f8

Interrupt Source 178 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO178
BitsTypeResetNameDescription
1:0rwxPRIO178

RV_PLIC.IE0_0 @ 0x300

Interrupt Enable for Target 0

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
E_31 E_30 E_29 E_28 E_27 E_26 E_25 E_24 E_23 E_22 E_21 E_20 E_19 E_18 E_17 E_16
1514131211109876543210
E_15 E_14 E_13 E_12 E_11 E_10 E_9 E_8 E_7 E_6 E_5 E_4 E_3 E_2 E_1 E_0
BitsTypeResetNameDescription
0rwxE_0

Interrupt Enable of Source

1rwxE_1

Interrupt Enable of Source

2rwxE_2

Interrupt Enable of Source

3rwxE_3

Interrupt Enable of Source

4rwxE_4

Interrupt Enable of Source

5rwxE_5

Interrupt Enable of Source

6rwxE_6

Interrupt Enable of Source

7rwxE_7

Interrupt Enable of Source

8rwxE_8

Interrupt Enable of Source

9rwxE_9

Interrupt Enable of Source

10rwxE_10

Interrupt Enable of Source

11rwxE_11

Interrupt Enable of Source

12rwxE_12

Interrupt Enable of Source

13rwxE_13

Interrupt Enable of Source

14rwxE_14

Interrupt Enable of Source

15rwxE_15

Interrupt Enable of Source

16rwxE_16

Interrupt Enable of Source

17rwxE_17

Interrupt Enable of Source

18rwxE_18

Interrupt Enable of Source

19rwxE_19

Interrupt Enable of Source

20rwxE_20

Interrupt Enable of Source

21rwxE_21

Interrupt Enable of Source

22rwxE_22

Interrupt Enable of Source

23rwxE_23

Interrupt Enable of Source

24rwxE_24

Interrupt Enable of Source

25rwxE_25

Interrupt Enable of Source

26rwxE_26

Interrupt Enable of Source

27rwxE_27

Interrupt Enable of Source

28rwxE_28

Interrupt Enable of Source

29rwxE_29

Interrupt Enable of Source

30rwxE_30

Interrupt Enable of Source

31rwxE_31

Interrupt Enable of Source


RV_PLIC.IE0_1 @ 0x304

Interrupt Enable for Target 0

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
E_63 E_62 E_61 E_60 E_59 E_58 E_57 E_56 E_55 E_54 E_53 E_52 E_51 E_50 E_49 E_48
1514131211109876543210
E_47 E_46 E_45 E_44 E_43 E_42 E_41 E_40 E_39 E_38 E_37 E_36 E_35 E_34 E_33 E_32
BitsTypeResetNameDescription
0rwxE_32

For RV_PLIC1

1rwxE_33

For RV_PLIC1

2rwxE_34

For RV_PLIC1

3rwxE_35

For RV_PLIC1

4rwxE_36

For RV_PLIC1

5rwxE_37

For RV_PLIC1

6rwxE_38

For RV_PLIC1

7rwxE_39

For RV_PLIC1

8rwxE_40

For RV_PLIC1

9rwxE_41

For RV_PLIC1

10rwxE_42

For RV_PLIC1

11rwxE_43

For RV_PLIC1

12rwxE_44

For RV_PLIC1

13rwxE_45

For RV_PLIC1

14rwxE_46

For RV_PLIC1

15rwxE_47

For RV_PLIC1

16rwxE_48

For RV_PLIC1

17rwxE_49

For RV_PLIC1

18rwxE_50

For RV_PLIC1

19rwxE_51

For RV_PLIC1

20rwxE_52

For RV_PLIC1

21rwxE_53

For RV_PLIC1

22rwxE_54

For RV_PLIC1

23rwxE_55

For RV_PLIC1

24rwxE_56

For RV_PLIC1

25rwxE_57

For RV_PLIC1

26rwxE_58

For RV_PLIC1

27rwxE_59

For RV_PLIC1

28rwxE_60

For RV_PLIC1

29rwxE_61

For RV_PLIC1

30rwxE_62

For RV_PLIC1

31rwxE_63

For RV_PLIC1


RV_PLIC.IE0_2 @ 0x308

Interrupt Enable for Target 0

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
E_95 E_94 E_93 E_92 E_91 E_90 E_89 E_88 E_87 E_86 E_85 E_84 E_83 E_82 E_81 E_80
1514131211109876543210
E_79 E_78 E_77 E_76 E_75 E_74 E_73 E_72 E_71 E_70 E_69 E_68 E_67 E_66 E_65 E_64
BitsTypeResetNameDescription
0rwxE_64

For RV_PLIC2

1rwxE_65

For RV_PLIC2

2rwxE_66

For RV_PLIC2

3rwxE_67

For RV_PLIC2

4rwxE_68

For RV_PLIC2

5rwxE_69

For RV_PLIC2

6rwxE_70

For RV_PLIC2

7rwxE_71

For RV_PLIC2

8rwxE_72

For RV_PLIC2

9rwxE_73

For RV_PLIC2

10rwxE_74

For RV_PLIC2

11rwxE_75

For RV_PLIC2

12rwxE_76

For RV_PLIC2

13rwxE_77

For RV_PLIC2

14rwxE_78

For RV_PLIC2

15rwxE_79

For RV_PLIC2

16rwxE_80

For RV_PLIC2

17rwxE_81

For RV_PLIC2

18rwxE_82

For RV_PLIC2

19rwxE_83

For RV_PLIC2

20rwxE_84

For RV_PLIC2

21rwxE_85

For RV_PLIC2

22rwxE_86

For RV_PLIC2

23rwxE_87

For RV_PLIC2

24rwxE_88

For RV_PLIC2

25rwxE_89

For RV_PLIC2

26rwxE_90

For RV_PLIC2

27rwxE_91

For RV_PLIC2

28rwxE_92

For RV_PLIC2

29rwxE_93

For RV_PLIC2

30rwxE_94

For RV_PLIC2

31rwxE_95

For RV_PLIC2


RV_PLIC.IE0_3 @ 0x30c

Interrupt Enable for Target 0

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
E_127 E_126 E_125 E_124 E_123 E_122 E_121 E_120 E_119 E_118 E_117 E_116 E_115 E_114 E_113 E_112
1514131211109876543210
E_111 E_110 E_109 E_108 E_107 E_106 E_105 E_104 E_103 E_102 E_101 E_100 E_99 E_98 E_97 E_96
BitsTypeResetNameDescription
0rwxE_96

For RV_PLIC3

1rwxE_97

For RV_PLIC3

2rwxE_98

For RV_PLIC3

3rwxE_99

For RV_PLIC3

4rwxE_100

For RV_PLIC3

5rwxE_101

For RV_PLIC3

6rwxE_102

For RV_PLIC3

7rwxE_103

For RV_PLIC3

8rwxE_104

For RV_PLIC3

9rwxE_105

For RV_PLIC3

10rwxE_106

For RV_PLIC3

11rwxE_107

For RV_PLIC3

12rwxE_108

For RV_PLIC3

13rwxE_109

For RV_PLIC3

14rwxE_110

For RV_PLIC3

15rwxE_111

For RV_PLIC3

16rwxE_112

For RV_PLIC3

17rwxE_113

For RV_PLIC3

18rwxE_114

For RV_PLIC3

19rwxE_115

For RV_PLIC3

20rwxE_116

For RV_PLIC3

21rwxE_117

For RV_PLIC3

22rwxE_118

For RV_PLIC3

23rwxE_119

For RV_PLIC3

24rwxE_120

For RV_PLIC3

25rwxE_121

For RV_PLIC3

26rwxE_122

For RV_PLIC3

27rwxE_123

For RV_PLIC3

28rwxE_124

For RV_PLIC3

29rwxE_125

For RV_PLIC3

30rwxE_126

For RV_PLIC3

31rwxE_127

For RV_PLIC3


RV_PLIC.IE0_4 @ 0x310

Interrupt Enable for Target 0

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
E_159 E_158 E_157 E_156 E_155 E_154 E_153 E_152 E_151 E_150 E_149 E_148 E_147 E_146 E_145 E_144
1514131211109876543210
E_143 E_142 E_141 E_140 E_139 E_138 E_137 E_136 E_135 E_134 E_133 E_132 E_131 E_130 E_129 E_128
BitsTypeResetNameDescription
0rwxE_128

For RV_PLIC4

1rwxE_129

For RV_PLIC4

2rwxE_130

For RV_PLIC4

3rwxE_131

For RV_PLIC4

4rwxE_132

For RV_PLIC4

5rwxE_133

For RV_PLIC4

6rwxE_134

For RV_PLIC4

7rwxE_135

For RV_PLIC4

8rwxE_136

For RV_PLIC4

9rwxE_137

For RV_PLIC4

10rwxE_138

For RV_PLIC4

11rwxE_139

For RV_PLIC4

12rwxE_140

For RV_PLIC4

13rwxE_141

For RV_PLIC4

14rwxE_142

For RV_PLIC4

15rwxE_143

For RV_PLIC4

16rwxE_144

For RV_PLIC4

17rwxE_145

For RV_PLIC4

18rwxE_146

For RV_PLIC4

19rwxE_147

For RV_PLIC4

20rwxE_148

For RV_PLIC4

21rwxE_149

For RV_PLIC4

22rwxE_150

For RV_PLIC4

23rwxE_151

For RV_PLIC4

24rwxE_152

For RV_PLIC4

25rwxE_153

For RV_PLIC4

26rwxE_154

For RV_PLIC4

27rwxE_155

For RV_PLIC4

28rwxE_156

For RV_PLIC4

29rwxE_157

For RV_PLIC4

30rwxE_158

For RV_PLIC4

31rwxE_159

For RV_PLIC4


RV_PLIC.IE0_5 @ 0x314

Interrupt Enable for Target 0

Reset default = 0x0, mask 0x7ffff
31302928272625242322212019181716
  E_178 E_177 E_176
1514131211109876543210
E_175 E_174 E_173 E_172 E_171 E_170 E_169 E_168 E_167 E_166 E_165 E_164 E_163 E_162 E_161 E_160
BitsTypeResetNameDescription
0rwxE_160

For RV_PLIC5

1rwxE_161

For RV_PLIC5

2rwxE_162

For RV_PLIC5

3rwxE_163

For RV_PLIC5

4rwxE_164

For RV_PLIC5

5rwxE_165

For RV_PLIC5

6rwxE_166

For RV_PLIC5

7rwxE_167

For RV_PLIC5

8rwxE_168

For RV_PLIC5

9rwxE_169

For RV_PLIC5

10rwxE_170

For RV_PLIC5

11rwxE_171

For RV_PLIC5

12rwxE_172

For RV_PLIC5

13rwxE_173

For RV_PLIC5

14rwxE_174

For RV_PLIC5

15rwxE_175

For RV_PLIC5

16rwxE_176

For RV_PLIC5

17rwxE_177

For RV_PLIC5

18rwxE_178

For RV_PLIC5


RV_PLIC.THRESHOLD0 @ 0x318

Threshold of priority for Target 0

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  THRESHOLD0
BitsTypeResetNameDescription
1:0rwxTHRESHOLD0

RV_PLIC.CC0 @ 0x31c

Claim interrupt by read, complete interrupt by write for Target 0. Value read/written is interrupt ID. Reading a value of 0 means no pending interrupts.

Reset default = 0x0, mask 0xff
31302928272625242322212019181716
 
1514131211109876543210
  CC0
BitsTypeResetNameDescription
7:0rwxCC0

RV_PLIC.MSIP0 @ 0x320

msip for Hart 0. Write 1 to here asserts software interrupt for Hart msip_o[0], write 0 to clear.

Reset default = 0x0, mask 0x1
31302928272625242322212019181716
 
1514131211109876543210
  MSIP0
BitsTypeResetNameDescription
0rwxMSIP0

Software Interrupt Pending register