# Overview

This document specifies the functionality of the sensor control module. The sensor control module is a comportable front-end to the analog sensor top.

It provides basic alert functionality, pad debug hook ups, and a small amount of open source visible status readback. Long term, this is a module that can be absorbed directly into the analog sensor top.

## Features

• Alert hand-shake with analog sensor top
• Alert forwarding to alert handler
• Status readback for analog sensor top
• Pad debug hook up for analog sensor top

# Theory of Operations

## Block Diagram

The diagram below shows how sensor control helps analog sensor top integration into the overall design.

The analog sensor top sends alert requests in independent, differential form to the sensor control. Each alert request consists of a pair of signals, one active high and one active low. The active polarity of each signal is independent. This is due to the imprecise timing sensor that drives the alert. This means that the sensor control recognizes an active alert as long as one of the lines is active, and not the pair of signals being in a particular state. Each signal in the differential pair is thus a separate dedicated alert indicator.

Once an alert request is detected as active, the sensor control then formulates a proper alert event through the prim_alert_sender and sends a notification to the alert handler.

The sensor control can optionally generate alert acknowledgements back to the analog sensor top. When an alert request is detected as active, the sensor control has 3 options after sending out the alert:

• Do not acknowledge: Allow alerts to be continually triggered.
• Software acknowledge: Let software decide whether an alert should stop triggering.
• Hardware acknowledge. Let hardware immediately acknowledge the alert.

Once the analog sensor top receives the acknowledgment, it then drops the corresponding alert request.

## Hardware Interfaces

### Signals

Referring to the Comportable guideline for peripheral device functionality, the module SENSOR_CTRL has the following hardware interfaces defined.

Primary Clock: clk_i

Other Clocks: none

Bus Device Interfaces (TL-UL): tl

Bus Host Interfaces (TL-UL): none

Peripheral Pins for Chip IO:

Pin namedirectionDescription
ast_debug_out[8:0]output

ast debug outputs to pinmux

Interrupts: none

recov_as

Triggered through AST

recov_cg

Triggered through AST

recov_gd

Triggered through AST

recov_ts_hi

Triggered through AST

recov_ts_lo

Triggered through AST

recov_fla

Triggered through AST

recov_otp

Triggered through AST

recov_ot0

Triggered through AST

recov_ot1

Triggered through AST

recov_ot2

Triggered through AST

recov_ot3

Triggered through AST

recov_ot4

Triggered through AST

recov_ot5

Triggered through AST

The table below lists other signals.

Signal Direction Type Description
ast_alert_i input ast_pkg::ast_alert_req_t Incoming alert requests from analog sensor top
ast_alert_o output ast_pkg::ast_alert_rsp_t Outgoing alert acknowledgments to analog sensor top
status_i input ast_pkg::ast_status_t Incoming analog sensor top status
ast2pinmux_i input logic [ast_pkg::Ast2PadOutWidth-1:0] Incoming analog sensor top debug output signals
cio_ast_debug_out output logic [ast_pkg::Ast2PadOutWidth-1:0] Outgoing analog sensor top debug output signals to pinmux

# Programmer’s Guide

Each available alert has a corresponding acknowledgment control. Program ACK_MODE.VAL to the appropriate value for no acknowledgment, software acknowledgment or hardware acknowledgment.

If software acknowledge is selected, ALERT_STATE can be used to determine the current state of an alert. When the alert state is cleared (rw1c), the analog sensor top alert will also be acknowledged.

## Register Table

Reset default = 0x0, mask 0x1fff
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 recov_ot5 recov_ot4 recov_ot3 recov_ot2 recov_ot1 recov_ot0 recov_otp recov_fla recov_ts_lo recov_ts_hi recov_gd recov_cg recov_as
BitsTypeResetNameDescription
0wo0x0recov_as

Write 1 to trigger one alert event of this kind.

1wo0x0recov_cg

Write 1 to trigger one alert event of this kind.

2wo0x0recov_gd

Write 1 to trigger one alert event of this kind.

3wo0x0recov_ts_hi

Write 1 to trigger one alert event of this kind.

4wo0x0recov_ts_lo

Write 1 to trigger one alert event of this kind.

5wo0x0recov_fla

Write 1 to trigger one alert event of this kind.

6wo0x0recov_otp

Write 1 to trigger one alert event of this kind.

7wo0x0recov_ot0

Write 1 to trigger one alert event of this kind.

8wo0x0recov_ot1

Write 1 to trigger one alert event of this kind.

9wo0x0recov_ot2

Write 1 to trigger one alert event of this kind.

10wo0x0recov_ot3

Write 1 to trigger one alert event of this kind.

11wo0x0recov_ot4

Write 1 to trigger one alert event of this kind.

12wo0x0recov_ot5

Write 1 to trigger one alert event of this kind.

SENSOR_CTRL.CFG_REGWEN @ 0x4

Controls the configurability of ACK_MODE register.

Reset default = 0x1, mask 0x1
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 EN
BitsTypeResetNameDescription
0rw0c0x1EN

Configuration enable.

SENSOR_CTRL.ACK_MODE @ 0x8

Reset default = 0x0, mask 0x3ffffff
Register enable = CFG_REGWEN
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 VAL_12 VAL_11 VAL_10 VAL_9 VAL_8 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 VAL_7 VAL_6 VAL_5 VAL_4 VAL_3 VAL_2 VAL_1 VAL_0
BitsTypeResetNameDescription
1:0rw0x0VAL_0

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

3:2rw0x0VAL_1

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

5:4rw0x0VAL_2

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

7:6rw0x0VAL_3

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

9:8rw0x0VAL_4

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

11:10rw0x0VAL_5

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

13:12rw0x0VAL_6

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

15:14rw0x0VAL_7

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

17:16rw0x0VAL_8

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

19:18rw0x0VAL_9

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

21:20rw0x0VAL_10

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

23:22rw0x0VAL_11

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

25:24rw0x0VAL_12

Acknowledge mode to alerts. 0 is immediate acknowledge, the hardware immediately acks an incoming alert. 1 is software acknowledge. Software must program the appropriate bit in ALERT_STATE to acknowledge the alert. 2 is no acknowledge. When in this mode, any alert will effectively be considered fatal to the system. 3 is not a valid selection, but behaves similarly to 2.

Reset default = 0x0, mask 0x1fff
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 VAL_12 VAL_11 VAL_10 VAL_9 VAL_8 VAL_7 VAL_6 VAL_5 VAL_4 VAL_3 VAL_2 VAL_1 VAL_0
BitsTypeResetNameDescription
0rw0x0VAL_0

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

1rw0x0VAL_1

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

2rw0x0VAL_2

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

3rw0x0VAL_3

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

4rw0x0VAL_4

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

5rw0x0VAL_5

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

6rw0x0VAL_6

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

7rw0x0VAL_7

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

8rw0x0VAL_8

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

9rw0x0VAL_9

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

10rw0x0VAL_10

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

11rw0x0VAL_11

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

12rw0x0VAL_12

Alert trigger for testing 0 No alerts triggered 1 Continuously trigger alert until disabled For bit mapping, please see ALERT_TEST

A bit is set whenever there is an incoming alert event. Software reads back the alert that was set and clears the appropriate bits to acknowledge the alert.

Reset default = 0x0, mask 0x1fff

This is only valid when ACK_MODE is set to software. For bit mapping, please see ALERT_TEST

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 VAL_12 VAL_11 VAL_10 VAL_9 VAL_8 VAL_7 VAL_6 VAL_5 VAL_4 VAL_3 VAL_2 VAL_1 VAL_0
BitsTypeResetNameDescription
0rw1c0x0VAL_0

1 - An alert event has been set 0 - No alert event has been set

1rw1c0x0VAL_1

1 - An alert event has been set 0 - No alert event has been set

2rw1c0x0VAL_2

1 - An alert event has been set 0 - No alert event has been set

3rw1c0x0VAL_3

1 - An alert event has been set 0 - No alert event has been set

4rw1c0x0VAL_4

1 - An alert event has been set 0 - No alert event has been set

5rw1c0x0VAL_5

1 - An alert event has been set 0 - No alert event has been set

6rw1c0x0VAL_6

1 - An alert event has been set 0 - No alert event has been set

7rw1c0x0VAL_7

1 - An alert event has been set 0 - No alert event has been set

8rw1c0x0VAL_8

1 - An alert event has been set 0 - No alert event has been set

9rw1c0x0VAL_9

1 - An alert event has been set 0 - No alert event has been set

10rw1c0x0VAL_10

1 - An alert event has been set 0 - No alert event has been set

11rw1c0x0VAL_11

1 - An alert event has been set 0 - No alert event has been set

12rw1c0x0VAL_12

1 - An alert event has been set 0 - No alert event has been set

SENSOR_CTRL.STATUS @ 0x14