Interrupt Controller Technical Specification

Overview

This document specifies the Interrupt Controller (RV_PLIC) functionality. This module conforms to the Comportable guideline for peripheral functionality. See that document for integration overview within the broader top level system.

Features

  • RISC-V Platform-Level Interrupt Controller (PLIC) compliant interrupt controller
  • Support arbitrary number of interrupt vectors (up to 255) and targets
  • Support interrupt enable, interrupt status registers
  • Memory-mapped MSIP register per HART for software interrupt control.

Description

The RV_PLIC module is designed to manage various interrupt sources from the peripherals. It receives interrupt events as either edge or level of the incoming interrupt signals (intr_src_i) and can notify multiple targets.

Compatibility

The RV_PLIC is compatible with any RISC-V core implementing the RISC-V privilege specification.

Theory of Operations

Block Diagram

RV_PLIC Block Diagram

Hardware Interfaces

Referring to the Comportable guideline for peripheral device functionality, the module RV_PLIC has the following hardware interfaces defined.

Primary Clock: clk_i

Other Clocks: none

Bus Device Interfaces (TL-UL): tl

Bus Host Interfaces (TL-UL): none

Peripheral Pins for Chip IO: none

Interrupts: none

Security Alerts:

Alert NameDescription
fatal_fault

This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected.

Design Details

Identifier

Each interrupt source has a unique ID assigned based upon its bit position within the input intr_src_i. ID ranges from 0 to N, the number of interrupt sources. ID 0 is reserved and represents no interrupt. The bit 0 of intr_src_i shall be tied to 0 from the outside of RV_PLIC. The intr_src_i[i] bit has an ID of i. This ID is used when targets “claim” the interrupt and to “complete” the interrupt event.

Priority and Threshold

Interrupt sources have configurable priority values. The maximum value of the priority is configurable through the localparam MAX_PRIO in the rv_plic top-level module. For each target there is a threshold value (THRESHOLD0 for target 0). RV_PLIC notifies a target of an interrupt only if it’s priority is strictly greater than the target’s threshold. Note this means an interrupt with a priority is 0 is effectively prevented from causing an interrupt at any target and a target can suppress all interrupts by setting it’s threshold to the max priority value.

MAX_PRIO parameter is most area contributing option in RV_PLIC. If MAX_PRIO is big, then finding the highest priority in Process module may consume a lot of logic gates.

Interrupt Gateways

The Gateway observes incoming interrupt sources and converts them to a common interrupt format used internally by RV_PLIC. It can be parameterized to detect interrupts events on an edge (when the signal changes from 0 to 1) or level basis (where the signal remains at 1). The choice is a system-integration decision and can be configured via the design parameter LevelEdgeTrig for each interrupt request.

When the gateway detects an interrupt event it raises the interrupt pending bit (IP) for that interrupt source. When an interrupt is claimed by a target the relevant bit of IP is cleared. A bit in IP will not be reasserted until the target signals completion of the interrupt. Any new interrupt event between a bit in IP asserting and completing that interrupt is ignored. In particular this means that for edge triggered interrupts if a new edge is seen after the source’s IP bit is asserted but before completion, that edge will be ignored (counting missed edges as discussed in the RISC-V PLIC specification is not supported).

Note that there is no ability for a level triggered interrupt to be cancelled. If the interrupt drops after the gateway has set a bit in IP, the bit will remain set until the interrupt is completed. The SW handler should be conscious of this and check the interrupt still requires handling in the handler if this behaviour is possible.

Interrupt Enables

Each target has a set of Interrupt Enable (IE0 for target 0) registers. Each bit in the IE0 registers controls the corresponding interrupt source. If an interrupt source is disabled for a target, then interrupt events from that source won’t trigger an interrupt at the target. RV_PLIC doesn’t have a global interrupt disable feature.

Interrupt Claims

“Claiming” an interrupt is done by a target reading the associated Claim/Completion register for the target (CC0 for target 0). The return value of the CC0 read represents the ID of the pending interrupt that has the highest priority. If two or more pending interrupts have the same priority, RV_PLIC chooses the one with lowest ID. Only interrupts that that are enabled for the target can be claimed. The target priority threshold doesn’t matter (this only factors into whether an interrupt is signalled to the target) so lower priority interrupt IDs can be returned on a read from CC0. If no interrupt is pending (or all pending interrupts are disabled for the target) a read of CC0 returns an ID of 0.

Interrupt Completion

After an interrupt is claimed, the relevant bit of interrupt pending (IP) is cleared, regardless of the status of the intr_src_i input value. Until a target “completes” the interrupt, it won’t be re-asserted if a new event for the interrupt occurs. A target completes the interrupt by writing the ID of the interrupt to the Claim/Complete register (CC0 for target 0). The write event is forwarded to the Gateway logic, which resets the interrupt status to accept a new interrupt event. The assumption is that the processor has cleaned up the originating interrupt event during the time between claim and complete such that intr_src_i[ID] will have de-asserted (unless a new interrupt has occurred).

In the example above an interrupt for source ID i is configured as a level interrupt and is raised at a, this results in the target being notified of the interrupt at b. The target claims the interrupt at c (reading i from it’s Claim/Complete register) so irq_o deasserts though intr_src_i[i] remains raised. The SW handles the interrupt and it drops at e. However a new interrupt quickly occurs at f. As complete hasn’t been signaled yet irq_o isn’t asserted. At g the interrupt is completed (by writing i to it’s Claim/Complete register) so at h irq_o is asserted due to the new interrupt.

Programmers Guide

Initialization

After reset, RV_PLIC doesn’t generate any interrupts to any targets even if interrupt sources are set, as all priorities and thresholds are 0 by default and all IE values are 0. Software should configure the above three registers.

PRIO0 .. PRIO31 registers are unique. So, only one of the targets shall configure them.

// Pseudo-code below
void plic_init() {
  // Configure priority
  // Note that PRIO0 register doesn't affect as intr_src_i[0] is tied to 0.
  for (int i = 0; i < N_SOURCE; ++i) {
    *(PRIO + i) = value(i);
  }
}

void plic_threshold(tid, threshold) {
  *(THRESHOLD + tid) = threshold;
}

void plic_enable(tid, iid) {
  // iid: 0-based ID
  int offset = ceil(N_SOURCE / 32) * tid + (iid >> 5);

  *(IE + offset) = *(IE + offset) | (1 << (iid % 32));
}

Handling Interrupt Request Events

If software receives an interrupt request, it is recommended to follow the steps shown below (assuming target 0 which uses CC0 for claim/complete).

  1. Claim the interrupts right after entering to the interrupt service routine by reading the CC0 register.
  2. Determine which interrupt should be serviced based on the values read from the CC0 register.
  3. Execute ISR, clearing the originating peripheral interrupt.
  4. Write Interrupt ID to CC0
  5. Repeat as necessary for other pending interrupts.

It is possible to have multiple interrupt events claimed. If software claims one interrupt request, then the process module advertises any pending interrupts with lower priority unless new higher priority interrupt events occur. If a higher interrupt event occurs after previous interrupt is claimed, the RV_PLIC IP advertises the higher priority interrupt. Software may utilize an event manager inside a loop so that interrupt claiming and completion can be separated.

void interrupt_service() {
  uint32_t tid = /* ... */;
  uint32_t iid = *(CC + tid);
  if (iid == 0) {
    // Interrupt is claimed by one of other targets.
    return;
  }

  do {
    // Process interrupts...
    // ...

    // Finish.
    *(CC + tid) = iid;
    iid = *(CC + tid);
  } while (iid != 0);
}

Device Interface Functions (DIFs)

To use this DIF, include the following C header:

#include "sw/device/lib/dif/dif_rv_plic.h"

This header provides the following device interface functions:

Registers

The RV_PLIC in the top level is generated by topgen tool so that the number of interrupt sources may be different.

  • IE: CEILING(N_SOURCE / DW) X N_TARGET Each bit enables corresponding interrupt source. Each target has IE set.
  • PRIO: N_SOURCE Universal set across all targets. Lower n bits are valid. n is determined by MAX_PRIO parameter
  • THRESHOLD: N_TARGET Priority threshold per target. Only priority of the interrupt greater than threshold can raise interrupt notification to the target.
  • IP: CEILING(N_SOURCE / DW) Pending bits right after the gateways. Read-only
  • CC: N_TARGET Claim by read, complete by write
RV_PLIC.PRIO0 @ 0x0

Interrupt Source 0 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO0
BitsTypeResetNameDescription
1:0rw0x0PRIO0

RV_PLIC.PRIO1 @ 0x4

Interrupt Source 1 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO1
BitsTypeResetNameDescription
1:0rw0x0PRIO1

RV_PLIC.PRIO2 @ 0x8

Interrupt Source 2 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO2
BitsTypeResetNameDescription
1:0rw0x0PRIO2

RV_PLIC.PRIO3 @ 0xc

Interrupt Source 3 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO3
BitsTypeResetNameDescription
1:0rw0x0PRIO3

RV_PLIC.PRIO4 @ 0x10

Interrupt Source 4 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO4
BitsTypeResetNameDescription
1:0rw0x0PRIO4

RV_PLIC.PRIO5 @ 0x14

Interrupt Source 5 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO5
BitsTypeResetNameDescription
1:0rw0x0PRIO5

RV_PLIC.PRIO6 @ 0x18

Interrupt Source 6 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO6
BitsTypeResetNameDescription
1:0rw0x0PRIO6

RV_PLIC.PRIO7 @ 0x1c

Interrupt Source 7 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO7
BitsTypeResetNameDescription
1:0rw0x0PRIO7

RV_PLIC.PRIO8 @ 0x20

Interrupt Source 8 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO8
BitsTypeResetNameDescription
1:0rw0x0PRIO8

RV_PLIC.PRIO9 @ 0x24

Interrupt Source 9 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO9
BitsTypeResetNameDescription
1:0rw0x0PRIO9

RV_PLIC.PRIO10 @ 0x28

Interrupt Source 10 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO10
BitsTypeResetNameDescription
1:0rw0x0PRIO10

RV_PLIC.PRIO11 @ 0x2c

Interrupt Source 11 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO11
BitsTypeResetNameDescription
1:0rw0x0PRIO11

RV_PLIC.PRIO12 @ 0x30

Interrupt Source 12 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO12
BitsTypeResetNameDescription
1:0rw0x0PRIO12

RV_PLIC.PRIO13 @ 0x34

Interrupt Source 13 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO13
BitsTypeResetNameDescription
1:0rw0x0PRIO13

RV_PLIC.PRIO14 @ 0x38

Interrupt Source 14 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO14
BitsTypeResetNameDescription
1:0rw0x0PRIO14

RV_PLIC.PRIO15 @ 0x3c

Interrupt Source 15 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO15
BitsTypeResetNameDescription
1:0rw0x0PRIO15

RV_PLIC.PRIO16 @ 0x40

Interrupt Source 16 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO16
BitsTypeResetNameDescription
1:0rw0x0PRIO16

RV_PLIC.PRIO17 @ 0x44

Interrupt Source 17 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO17
BitsTypeResetNameDescription
1:0rw0x0PRIO17

RV_PLIC.PRIO18 @ 0x48

Interrupt Source 18 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO18
BitsTypeResetNameDescription
1:0rw0x0PRIO18

RV_PLIC.PRIO19 @ 0x4c

Interrupt Source 19 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO19
BitsTypeResetNameDescription
1:0rw0x0PRIO19

RV_PLIC.PRIO20 @ 0x50

Interrupt Source 20 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO20
BitsTypeResetNameDescription
1:0rw0x0PRIO20

RV_PLIC.PRIO21 @ 0x54

Interrupt Source 21 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO21
BitsTypeResetNameDescription
1:0rw0x0PRIO21

RV_PLIC.PRIO22 @ 0x58

Interrupt Source 22 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO22
BitsTypeResetNameDescription
1:0rw0x0PRIO22

RV_PLIC.PRIO23 @ 0x5c

Interrupt Source 23 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO23
BitsTypeResetNameDescription
1:0rw0x0PRIO23

RV_PLIC.PRIO24 @ 0x60

Interrupt Source 24 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO24
BitsTypeResetNameDescription
1:0rw0x0PRIO24

RV_PLIC.PRIO25 @ 0x64

Interrupt Source 25 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO25
BitsTypeResetNameDescription
1:0rw0x0PRIO25

RV_PLIC.PRIO26 @ 0x68

Interrupt Source 26 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO26
BitsTypeResetNameDescription
1:0rw0x0PRIO26

RV_PLIC.PRIO27 @ 0x6c

Interrupt Source 27 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO27
BitsTypeResetNameDescription
1:0rw0x0PRIO27

RV_PLIC.PRIO28 @ 0x70

Interrupt Source 28 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO28
BitsTypeResetNameDescription
1:0rw0x0PRIO28

RV_PLIC.PRIO29 @ 0x74

Interrupt Source 29 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO29
BitsTypeResetNameDescription
1:0rw0x0PRIO29

RV_PLIC.PRIO30 @ 0x78

Interrupt Source 30 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO30
BitsTypeResetNameDescription
1:0rw0x0PRIO30

RV_PLIC.PRIO31 @ 0x7c

Interrupt Source 31 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO31
BitsTypeResetNameDescription
1:0rw0x0PRIO31

RV_PLIC.PRIO32 @ 0x80

Interrupt Source 32 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO32
BitsTypeResetNameDescription
1:0rw0x0PRIO32

RV_PLIC.PRIO33 @ 0x84

Interrupt Source 33 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO33
BitsTypeResetNameDescription
1:0rw0x0PRIO33

RV_PLIC.PRIO34 @ 0x88

Interrupt Source 34 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO34
BitsTypeResetNameDescription
1:0rw0x0PRIO34

RV_PLIC.PRIO35 @ 0x8c

Interrupt Source 35 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO35
BitsTypeResetNameDescription
1:0rw0x0PRIO35

RV_PLIC.PRIO36 @ 0x90

Interrupt Source 36 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO36
BitsTypeResetNameDescription
1:0rw0x0PRIO36

RV_PLIC.PRIO37 @ 0x94

Interrupt Source 37 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO37
BitsTypeResetNameDescription
1:0rw0x0PRIO37

RV_PLIC.PRIO38 @ 0x98

Interrupt Source 38 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO38
BitsTypeResetNameDescription
1:0rw0x0PRIO38

RV_PLIC.PRIO39 @ 0x9c

Interrupt Source 39 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO39
BitsTypeResetNameDescription
1:0rw0x0PRIO39

RV_PLIC.PRIO40 @ 0xa0

Interrupt Source 40 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO40
BitsTypeResetNameDescription
1:0rw0x0PRIO40

RV_PLIC.PRIO41 @ 0xa4

Interrupt Source 41 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO41
BitsTypeResetNameDescription
1:0rw0x0PRIO41

RV_PLIC.PRIO42 @ 0xa8

Interrupt Source 42 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO42
BitsTypeResetNameDescription
1:0rw0x0PRIO42

RV_PLIC.PRIO43 @ 0xac

Interrupt Source 43 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO43
BitsTypeResetNameDescription
1:0rw0x0PRIO43

RV_PLIC.PRIO44 @ 0xb0

Interrupt Source 44 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO44
BitsTypeResetNameDescription
1:0rw0x0PRIO44

RV_PLIC.PRIO45 @ 0xb4

Interrupt Source 45 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO45
BitsTypeResetNameDescription
1:0rw0x0PRIO45

RV_PLIC.PRIO46 @ 0xb8

Interrupt Source 46 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO46
BitsTypeResetNameDescription
1:0rw0x0PRIO46

RV_PLIC.PRIO47 @ 0xbc

Interrupt Source 47 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO47
BitsTypeResetNameDescription
1:0rw0x0PRIO47

RV_PLIC.PRIO48 @ 0xc0

Interrupt Source 48 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO48
BitsTypeResetNameDescription
1:0rw0x0PRIO48

RV_PLIC.PRIO49 @ 0xc4

Interrupt Source 49 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO49
BitsTypeResetNameDescription
1:0rw0x0PRIO49

RV_PLIC.PRIO50 @ 0xc8

Interrupt Source 50 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO50
BitsTypeResetNameDescription
1:0rw0x0PRIO50

RV_PLIC.PRIO51 @ 0xcc

Interrupt Source 51 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO51
BitsTypeResetNameDescription
1:0rw0x0PRIO51

RV_PLIC.PRIO52 @ 0xd0

Interrupt Source 52 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO52
BitsTypeResetNameDescription
1:0rw0x0PRIO52

RV_PLIC.PRIO53 @ 0xd4

Interrupt Source 53 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO53
BitsTypeResetNameDescription
1:0rw0x0PRIO53

RV_PLIC.PRIO54 @ 0xd8

Interrupt Source 54 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO54
BitsTypeResetNameDescription
1:0rw0x0PRIO54

RV_PLIC.PRIO55 @ 0xdc

Interrupt Source 55 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO55
BitsTypeResetNameDescription
1:0rw0x0PRIO55

RV_PLIC.PRIO56 @ 0xe0

Interrupt Source 56 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO56
BitsTypeResetNameDescription
1:0rw0x0PRIO56

RV_PLIC.PRIO57 @ 0xe4

Interrupt Source 57 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO57
BitsTypeResetNameDescription
1:0rw0x0PRIO57

RV_PLIC.PRIO58 @ 0xe8

Interrupt Source 58 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO58
BitsTypeResetNameDescription
1:0rw0x0PRIO58

RV_PLIC.PRIO59 @ 0xec

Interrupt Source 59 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO59
BitsTypeResetNameDescription
1:0rw0x0PRIO59

RV_PLIC.PRIO60 @ 0xf0

Interrupt Source 60 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO60
BitsTypeResetNameDescription
1:0rw0x0PRIO60

RV_PLIC.PRIO61 @ 0xf4

Interrupt Source 61 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO61
BitsTypeResetNameDescription
1:0rw0x0PRIO61

RV_PLIC.PRIO62 @ 0xf8

Interrupt Source 62 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO62
BitsTypeResetNameDescription
1:0rw0x0PRIO62

RV_PLIC.PRIO63 @ 0xfc

Interrupt Source 63 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO63
BitsTypeResetNameDescription
1:0rw0x0PRIO63

RV_PLIC.PRIO64 @ 0x100

Interrupt Source 64 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO64
BitsTypeResetNameDescription
1:0rw0x0PRIO64

RV_PLIC.PRIO65 @ 0x104

Interrupt Source 65 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO65
BitsTypeResetNameDescription
1:0rw0x0PRIO65

RV_PLIC.PRIO66 @ 0x108

Interrupt Source 66 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO66
BitsTypeResetNameDescription
1:0rw0x0PRIO66

RV_PLIC.PRIO67 @ 0x10c

Interrupt Source 67 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO67
BitsTypeResetNameDescription
1:0rw0x0PRIO67

RV_PLIC.PRIO68 @ 0x110

Interrupt Source 68 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO68
BitsTypeResetNameDescription
1:0rw0x0PRIO68

RV_PLIC.PRIO69 @ 0x114

Interrupt Source 69 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO69
BitsTypeResetNameDescription
1:0rw0x0PRIO69

RV_PLIC.PRIO70 @ 0x118

Interrupt Source 70 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO70
BitsTypeResetNameDescription
1:0rw0x0PRIO70

RV_PLIC.PRIO71 @ 0x11c

Interrupt Source 71 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO71
BitsTypeResetNameDescription
1:0rw0x0PRIO71

RV_PLIC.PRIO72 @ 0x120

Interrupt Source 72 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO72
BitsTypeResetNameDescription
1:0rw0x0PRIO72

RV_PLIC.PRIO73 @ 0x124

Interrupt Source 73 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO73
BitsTypeResetNameDescription
1:0rw0x0PRIO73

RV_PLIC.PRIO74 @ 0x128

Interrupt Source 74 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO74
BitsTypeResetNameDescription
1:0rw0x0PRIO74

RV_PLIC.PRIO75 @ 0x12c

Interrupt Source 75 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO75
BitsTypeResetNameDescription
1:0rw0x0PRIO75

RV_PLIC.PRIO76 @ 0x130

Interrupt Source 76 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO76
BitsTypeResetNameDescription
1:0rw0x0PRIO76

RV_PLIC.PRIO77 @ 0x134

Interrupt Source 77 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO77
BitsTypeResetNameDescription
1:0rw0x0PRIO77

RV_PLIC.PRIO78 @ 0x138

Interrupt Source 78 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO78
BitsTypeResetNameDescription
1:0rw0x0PRIO78

RV_PLIC.PRIO79 @ 0x13c

Interrupt Source 79 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO79
BitsTypeResetNameDescription
1:0rw0x0PRIO79

RV_PLIC.PRIO80 @ 0x140

Interrupt Source 80 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO80
BitsTypeResetNameDescription
1:0rw0x0PRIO80

RV_PLIC.PRIO81 @ 0x144

Interrupt Source 81 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO81
BitsTypeResetNameDescription
1:0rw0x0PRIO81

RV_PLIC.PRIO82 @ 0x148

Interrupt Source 82 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO82
BitsTypeResetNameDescription
1:0rw0x0PRIO82

RV_PLIC.PRIO83 @ 0x14c

Interrupt Source 83 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO83
BitsTypeResetNameDescription
1:0rw0x0PRIO83

RV_PLIC.PRIO84 @ 0x150

Interrupt Source 84 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO84
BitsTypeResetNameDescription
1:0rw0x0PRIO84

RV_PLIC.PRIO85 @ 0x154

Interrupt Source 85 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO85
BitsTypeResetNameDescription
1:0rw0x0PRIO85

RV_PLIC.PRIO86 @ 0x158

Interrupt Source 86 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO86
BitsTypeResetNameDescription
1:0rw0x0PRIO86

RV_PLIC.PRIO87 @ 0x15c

Interrupt Source 87 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO87
BitsTypeResetNameDescription
1:0rw0x0PRIO87

RV_PLIC.PRIO88 @ 0x160

Interrupt Source 88 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO88
BitsTypeResetNameDescription
1:0rw0x0PRIO88

RV_PLIC.PRIO89 @ 0x164

Interrupt Source 89 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO89
BitsTypeResetNameDescription
1:0rw0x0PRIO89

RV_PLIC.PRIO90 @ 0x168

Interrupt Source 90 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO90
BitsTypeResetNameDescription
1:0rw0x0PRIO90

RV_PLIC.PRIO91 @ 0x16c

Interrupt Source 91 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO91
BitsTypeResetNameDescription
1:0rw0x0PRIO91

RV_PLIC.PRIO92 @ 0x170

Interrupt Source 92 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO92
BitsTypeResetNameDescription
1:0rw0x0PRIO92

RV_PLIC.PRIO93 @ 0x174

Interrupt Source 93 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO93
BitsTypeResetNameDescription
1:0rw0x0PRIO93

RV_PLIC.PRIO94 @ 0x178

Interrupt Source 94 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO94
BitsTypeResetNameDescription
1:0rw0x0PRIO94

RV_PLIC.PRIO95 @ 0x17c

Interrupt Source 95 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO95
BitsTypeResetNameDescription
1:0rw0x0PRIO95

RV_PLIC.PRIO96 @ 0x180

Interrupt Source 96 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO96
BitsTypeResetNameDescription
1:0rw0x0PRIO96

RV_PLIC.PRIO97 @ 0x184

Interrupt Source 97 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO97
BitsTypeResetNameDescription
1:0rw0x0PRIO97

RV_PLIC.PRIO98 @ 0x188

Interrupt Source 98 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO98
BitsTypeResetNameDescription
1:0rw0x0PRIO98

RV_PLIC.PRIO99 @ 0x18c

Interrupt Source 99 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO99
BitsTypeResetNameDescription
1:0rw0x0PRIO99

RV_PLIC.PRIO100 @ 0x190

Interrupt Source 100 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO100
BitsTypeResetNameDescription
1:0rw0x0PRIO100

RV_PLIC.PRIO101 @ 0x194

Interrupt Source 101 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO101
BitsTypeResetNameDescription
1:0rw0x0PRIO101

RV_PLIC.PRIO102 @ 0x198

Interrupt Source 102 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO102
BitsTypeResetNameDescription
1:0rw0x0PRIO102

RV_PLIC.PRIO103 @ 0x19c

Interrupt Source 103 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO103
BitsTypeResetNameDescription
1:0rw0x0PRIO103

RV_PLIC.PRIO104 @ 0x1a0

Interrupt Source 104 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO104
BitsTypeResetNameDescription
1:0rw0x0PRIO104

RV_PLIC.PRIO105 @ 0x1a4

Interrupt Source 105 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO105
BitsTypeResetNameDescription
1:0rw0x0PRIO105

RV_PLIC.PRIO106 @ 0x1a8

Interrupt Source 106 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO106
BitsTypeResetNameDescription
1:0rw0x0PRIO106

RV_PLIC.PRIO107 @ 0x1ac

Interrupt Source 107 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO107
BitsTypeResetNameDescription
1:0rw0x0PRIO107

RV_PLIC.PRIO108 @ 0x1b0

Interrupt Source 108 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO108
BitsTypeResetNameDescription
1:0rw0x0PRIO108

RV_PLIC.PRIO109 @ 0x1b4

Interrupt Source 109 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO109
BitsTypeResetNameDescription
1:0rw0x0PRIO109

RV_PLIC.PRIO110 @ 0x1b8

Interrupt Source 110 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO110
BitsTypeResetNameDescription
1:0rw0x0PRIO110

RV_PLIC.PRIO111 @ 0x1bc

Interrupt Source 111 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO111
BitsTypeResetNameDescription
1:0rw0x0PRIO111

RV_PLIC.PRIO112 @ 0x1c0

Interrupt Source 112 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO112
BitsTypeResetNameDescription
1:0rw0x0PRIO112

RV_PLIC.PRIO113 @ 0x1c4

Interrupt Source 113 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO113
BitsTypeResetNameDescription
1:0rw0x0PRIO113

RV_PLIC.PRIO114 @ 0x1c8

Interrupt Source 114 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO114
BitsTypeResetNameDescription
1:0rw0x0PRIO114

RV_PLIC.PRIO115 @ 0x1cc

Interrupt Source 115 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO115
BitsTypeResetNameDescription
1:0rw0x0PRIO115

RV_PLIC.PRIO116 @ 0x1d0

Interrupt Source 116 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO116
BitsTypeResetNameDescription
1:0rw0x0PRIO116

RV_PLIC.PRIO117 @ 0x1d4

Interrupt Source 117 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO117
BitsTypeResetNameDescription
1:0rw0x0PRIO117

RV_PLIC.PRIO118 @ 0x1d8

Interrupt Source 118 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO118
BitsTypeResetNameDescription
1:0rw0x0PRIO118

RV_PLIC.PRIO119 @ 0x1dc

Interrupt Source 119 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO119
BitsTypeResetNameDescription
1:0rw0x0PRIO119

RV_PLIC.PRIO120 @ 0x1e0

Interrupt Source 120 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO120
BitsTypeResetNameDescription
1:0rw0x0PRIO120

RV_PLIC.PRIO121 @ 0x1e4

Interrupt Source 121 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO121
BitsTypeResetNameDescription
1:0rw0x0PRIO121

RV_PLIC.PRIO122 @ 0x1e8

Interrupt Source 122 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO122
BitsTypeResetNameDescription
1:0rw0x0PRIO122

RV_PLIC.PRIO123 @ 0x1ec

Interrupt Source 123 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO123
BitsTypeResetNameDescription
1:0rw0x0PRIO123

RV_PLIC.PRIO124 @ 0x1f0

Interrupt Source 124 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO124
BitsTypeResetNameDescription
1:0rw0x0PRIO124

RV_PLIC.PRIO125 @ 0x1f4

Interrupt Source 125 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO125
BitsTypeResetNameDescription
1:0rw0x0PRIO125

RV_PLIC.PRIO126 @ 0x1f8

Interrupt Source 126 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO126
BitsTypeResetNameDescription
1:0rw0x0PRIO126

RV_PLIC.PRIO127 @ 0x1fc

Interrupt Source 127 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO127
BitsTypeResetNameDescription
1:0rw0x0PRIO127

RV_PLIC.PRIO128 @ 0x200

Interrupt Source 128 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO128
BitsTypeResetNameDescription
1:0rw0x0PRIO128

RV_PLIC.PRIO129 @ 0x204

Interrupt Source 129 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO129
BitsTypeResetNameDescription
1:0rw0x0PRIO129

RV_PLIC.PRIO130 @ 0x208

Interrupt Source 130 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO130
BitsTypeResetNameDescription
1:0rw0x0PRIO130

RV_PLIC.PRIO131 @ 0x20c

Interrupt Source 131 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO131
BitsTypeResetNameDescription
1:0rw0x0PRIO131

RV_PLIC.PRIO132 @ 0x210

Interrupt Source 132 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO132
BitsTypeResetNameDescription
1:0rw0x0PRIO132

RV_PLIC.PRIO133 @ 0x214

Interrupt Source 133 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO133
BitsTypeResetNameDescription
1:0rw0x0PRIO133

RV_PLIC.PRIO134 @ 0x218

Interrupt Source 134 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO134
BitsTypeResetNameDescription
1:0rw0x0PRIO134

RV_PLIC.PRIO135 @ 0x21c

Interrupt Source 135 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO135
BitsTypeResetNameDescription
1:0rw0x0PRIO135

RV_PLIC.PRIO136 @ 0x220

Interrupt Source 136 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO136
BitsTypeResetNameDescription
1:0rw0x0PRIO136

RV_PLIC.PRIO137 @ 0x224

Interrupt Source 137 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO137
BitsTypeResetNameDescription
1:0rw0x0PRIO137

RV_PLIC.PRIO138 @ 0x228

Interrupt Source 138 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO138
BitsTypeResetNameDescription
1:0rw0x0PRIO138

RV_PLIC.PRIO139 @ 0x22c

Interrupt Source 139 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO139
BitsTypeResetNameDescription
1:0rw0x0PRIO139

RV_PLIC.PRIO140 @ 0x230

Interrupt Source 140 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO140
BitsTypeResetNameDescription
1:0rw0x0PRIO140

RV_PLIC.PRIO141 @ 0x234

Interrupt Source 141 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO141
BitsTypeResetNameDescription
1:0rw0x0PRIO141

RV_PLIC.PRIO142 @ 0x238

Interrupt Source 142 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO142
BitsTypeResetNameDescription
1:0rw0x0PRIO142

RV_PLIC.PRIO143 @ 0x23c

Interrupt Source 143 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO143
BitsTypeResetNameDescription
1:0rw0x0PRIO143

RV_PLIC.PRIO144 @ 0x240

Interrupt Source 144 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO144
BitsTypeResetNameDescription
1:0rw0x0PRIO144

RV_PLIC.PRIO145 @ 0x244

Interrupt Source 145 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO145
BitsTypeResetNameDescription
1:0rw0x0PRIO145

RV_PLIC.PRIO146 @ 0x248

Interrupt Source 146 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO146
BitsTypeResetNameDescription
1:0rw0x0PRIO146

RV_PLIC.PRIO147 @ 0x24c

Interrupt Source 147 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO147
BitsTypeResetNameDescription
1:0rw0x0PRIO147

RV_PLIC.PRIO148 @ 0x250

Interrupt Source 148 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO148
BitsTypeResetNameDescription
1:0rw0x0PRIO148

RV_PLIC.PRIO149 @ 0x254

Interrupt Source 149 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO149
BitsTypeResetNameDescription
1:0rw0x0PRIO149

RV_PLIC.PRIO150 @ 0x258

Interrupt Source 150 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO150
BitsTypeResetNameDescription
1:0rw0x0PRIO150

RV_PLIC.PRIO151 @ 0x25c

Interrupt Source 151 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO151
BitsTypeResetNameDescription
1:0rw0x0PRIO151

RV_PLIC.PRIO152 @ 0x260

Interrupt Source 152 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO152
BitsTypeResetNameDescription
1:0rw0x0PRIO152

RV_PLIC.PRIO153 @ 0x264

Interrupt Source 153 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO153
BitsTypeResetNameDescription
1:0rw0x0PRIO153

RV_PLIC.PRIO154 @ 0x268

Interrupt Source 154 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO154
BitsTypeResetNameDescription
1:0rw0x0PRIO154

RV_PLIC.PRIO155 @ 0x26c

Interrupt Source 155 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO155
BitsTypeResetNameDescription
1:0rw0x0PRIO155

RV_PLIC.PRIO156 @ 0x270

Interrupt Source 156 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO156
BitsTypeResetNameDescription
1:0rw0x0PRIO156

RV_PLIC.PRIO157 @ 0x274

Interrupt Source 157 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO157
BitsTypeResetNameDescription
1:0rw0x0PRIO157

RV_PLIC.PRIO158 @ 0x278

Interrupt Source 158 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO158
BitsTypeResetNameDescription
1:0rw0x0PRIO158

RV_PLIC.PRIO159 @ 0x27c

Interrupt Source 159 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO159
BitsTypeResetNameDescription
1:0rw0x0PRIO159

RV_PLIC.PRIO160 @ 0x280

Interrupt Source 160 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO160
BitsTypeResetNameDescription
1:0rw0x0PRIO160

RV_PLIC.PRIO161 @ 0x284

Interrupt Source 161 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO161
BitsTypeResetNameDescription
1:0rw0x0PRIO161

RV_PLIC.PRIO162 @ 0x288

Interrupt Source 162 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO162
BitsTypeResetNameDescription
1:0rw0x0PRIO162

RV_PLIC.PRIO163 @ 0x28c

Interrupt Source 163 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO163
BitsTypeResetNameDescription
1:0rw0x0PRIO163

RV_PLIC.PRIO164 @ 0x290

Interrupt Source 164 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO164
BitsTypeResetNameDescription
1:0rw0x0PRIO164

RV_PLIC.PRIO165 @ 0x294

Interrupt Source 165 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO165
BitsTypeResetNameDescription
1:0rw0x0PRIO165

RV_PLIC.PRIO166 @ 0x298

Interrupt Source 166 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO166
BitsTypeResetNameDescription
1:0rw0x0PRIO166

RV_PLIC.PRIO167 @ 0x29c

Interrupt Source 167 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO167
BitsTypeResetNameDescription
1:0rw0x0PRIO167

RV_PLIC.PRIO168 @ 0x2a0

Interrupt Source 168 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO168
BitsTypeResetNameDescription
1:0rw0x0PRIO168

RV_PLIC.PRIO169 @ 0x2a4

Interrupt Source 169 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO169
BitsTypeResetNameDescription
1:0rw0x0PRIO169

RV_PLIC.PRIO170 @ 0x2a8

Interrupt Source 170 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO170
BitsTypeResetNameDescription
1:0rw0x0PRIO170

RV_PLIC.PRIO171 @ 0x2ac

Interrupt Source 171 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO171
BitsTypeResetNameDescription
1:0rw0x0PRIO171

RV_PLIC.PRIO172 @ 0x2b0

Interrupt Source 172 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO172
BitsTypeResetNameDescription
1:0rw0x0PRIO172

RV_PLIC.PRIO173 @ 0x2b4

Interrupt Source 173 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO173
BitsTypeResetNameDescription
1:0rw0x0PRIO173

RV_PLIC.PRIO174 @ 0x2b8

Interrupt Source 174 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO174
BitsTypeResetNameDescription
1:0rw0x0PRIO174

RV_PLIC.PRIO175 @ 0x2bc

Interrupt Source 175 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO175
BitsTypeResetNameDescription
1:0rw0x0PRIO175

RV_PLIC.PRIO176 @ 0x2c0

Interrupt Source 176 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO176
BitsTypeResetNameDescription
1:0rw0x0PRIO176

RV_PLIC.PRIO177 @ 0x2c4

Interrupt Source 177 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO177
BitsTypeResetNameDescription
1:0rw0x0PRIO177

RV_PLIC.PRIO178 @ 0x2c8

Interrupt Source 178 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO178
BitsTypeResetNameDescription
1:0rw0x0PRIO178

RV_PLIC.PRIO179 @ 0x2cc

Interrupt Source 179 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO179
BitsTypeResetNameDescription
1:0rw0x0PRIO179

RV_PLIC.PRIO180 @ 0x2d0

Interrupt Source 180 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO180
BitsTypeResetNameDescription
1:0rw0x0PRIO180

RV_PLIC.PRIO181 @ 0x2d4

Interrupt Source 181 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO181
BitsTypeResetNameDescription
1:0rw0x0PRIO181

RV_PLIC.PRIO182 @ 0x2d8

Interrupt Source 182 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO182
BitsTypeResetNameDescription
1:0rw0x0PRIO182

RV_PLIC.PRIO183 @ 0x2dc

Interrupt Source 183 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO183
BitsTypeResetNameDescription
1:0rw0x0PRIO183

RV_PLIC.PRIO184 @ 0x2e0

Interrupt Source 184 Priority

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  PRIO184
BitsTypeResetNameDescription
1:0rw0x0PRIO184

RV_PLIC.IP_0 @ 0x1000

Interrupt Pending

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
P_31 P_30 P_29 P_28 P_27 P_26 P_25 P_24 P_23 P_22 P_21 P_20 P_19 P_18 P_17 P_16
1514131211109876543210
P_15 P_14 P_13 P_12 P_11 P_10 P_9 P_8 P_7 P_6 P_5 P_4 P_3 P_2 P_1 P_0
BitsTypeResetNameDescription
0ro0x0P_0

Interrupt Pending of Source

1ro0x0P_1

Interrupt Pending of Source

2ro0x0P_2

Interrupt Pending of Source

3ro0x0P_3

Interrupt Pending of Source

4ro0x0P_4

Interrupt Pending of Source

5ro0x0P_5

Interrupt Pending of Source

6ro0x0P_6

Interrupt Pending of Source

7ro0x0P_7

Interrupt Pending of Source

8ro0x0P_8

Interrupt Pending of Source

9ro0x0P_9

Interrupt Pending of Source

10ro0x0P_10

Interrupt Pending of Source

11ro0x0P_11

Interrupt Pending of Source

12ro0x0P_12

Interrupt Pending of Source

13ro0x0P_13

Interrupt Pending of Source

14ro0x0P_14

Interrupt Pending of Source

15ro0x0P_15

Interrupt Pending of Source

16ro0x0P_16

Interrupt Pending of Source

17ro0x0P_17

Interrupt Pending of Source

18ro0x0P_18

Interrupt Pending of Source

19ro0x0P_19

Interrupt Pending of Source

20ro0x0P_20

Interrupt Pending of Source

21ro0x0P_21

Interrupt Pending of Source

22ro0x0P_22

Interrupt Pending of Source

23ro0x0P_23

Interrupt Pending of Source

24ro0x0P_24

Interrupt Pending of Source

25ro0x0P_25

Interrupt Pending of Source

26ro0x0P_26

Interrupt Pending of Source

27ro0x0P_27

Interrupt Pending of Source

28ro0x0P_28

Interrupt Pending of Source

29ro0x0P_29

Interrupt Pending of Source

30ro0x0P_30

Interrupt Pending of Source

31ro0x0P_31

Interrupt Pending of Source


RV_PLIC.IP_1 @ 0x1004

Interrupt Pending

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
P_63 P_62 P_61 P_60 P_59 P_58 P_57 P_56 P_55 P_54 P_53 P_52 P_51 P_50 P_49 P_48
1514131211109876543210
P_47 P_46 P_45 P_44 P_43 P_42 P_41 P_40 P_39 P_38 P_37 P_36 P_35 P_34 P_33 P_32
BitsTypeResetNameDescription
0ro0x0P_32

For RV_PLIC1

1ro0x0P_33

For RV_PLIC1

2ro0x0P_34

For RV_PLIC1

3ro0x0P_35

For RV_PLIC1

4ro0x0P_36

For RV_PLIC1

5ro0x0P_37

For RV_PLIC1

6ro0x0P_38

For RV_PLIC1

7ro0x0P_39

For RV_PLIC1

8ro0x0P_40

For RV_PLIC1

9ro0x0P_41

For RV_PLIC1

10ro0x0P_42

For RV_PLIC1

11ro0x0P_43

For RV_PLIC1

12ro0x0P_44

For RV_PLIC1

13ro0x0P_45

For RV_PLIC1

14ro0x0P_46

For RV_PLIC1

15ro0x0P_47

For RV_PLIC1

16ro0x0P_48

For RV_PLIC1

17ro0x0P_49

For RV_PLIC1

18ro0x0P_50

For RV_PLIC1

19ro0x0P_51

For RV_PLIC1

20ro0x0P_52

For RV_PLIC1

21ro0x0P_53

For RV_PLIC1

22ro0x0P_54

For RV_PLIC1

23ro0x0P_55

For RV_PLIC1

24ro0x0P_56

For RV_PLIC1

25ro0x0P_57

For RV_PLIC1

26ro0x0P_58

For RV_PLIC1

27ro0x0P_59

For RV_PLIC1

28ro0x0P_60

For RV_PLIC1

29ro0x0P_61

For RV_PLIC1

30ro0x0P_62

For RV_PLIC1

31ro0x0P_63

For RV_PLIC1


RV_PLIC.IP_2 @ 0x1008

Interrupt Pending

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
P_95 P_94 P_93 P_92 P_91 P_90 P_89 P_88 P_87 P_86 P_85 P_84 P_83 P_82 P_81 P_80
1514131211109876543210
P_79 P_78 P_77 P_76 P_75 P_74 P_73 P_72 P_71 P_70 P_69 P_68 P_67 P_66 P_65 P_64
BitsTypeResetNameDescription
0ro0x0P_64

For RV_PLIC2

1ro0x0P_65

For RV_PLIC2

2ro0x0P_66

For RV_PLIC2

3ro0x0P_67

For RV_PLIC2

4ro0x0P_68

For RV_PLIC2

5ro0x0P_69

For RV_PLIC2

6ro0x0P_70

For RV_PLIC2

7ro0x0P_71

For RV_PLIC2

8ro0x0P_72

For RV_PLIC2

9ro0x0P_73

For RV_PLIC2

10ro0x0P_74

For RV_PLIC2

11ro0x0P_75

For RV_PLIC2

12ro0x0P_76

For RV_PLIC2

13ro0x0P_77

For RV_PLIC2

14ro0x0P_78

For RV_PLIC2

15ro0x0P_79

For RV_PLIC2

16ro0x0P_80

For RV_PLIC2

17ro0x0P_81

For RV_PLIC2

18ro0x0P_82

For RV_PLIC2

19ro0x0P_83

For RV_PLIC2

20ro0x0P_84

For RV_PLIC2

21ro0x0P_85

For RV_PLIC2

22ro0x0P_86

For RV_PLIC2

23ro0x0P_87

For RV_PLIC2

24ro0x0P_88

For RV_PLIC2

25ro0x0P_89

For RV_PLIC2

26ro0x0P_90

For RV_PLIC2

27ro0x0P_91

For RV_PLIC2

28ro0x0P_92

For RV_PLIC2

29ro0x0P_93

For RV_PLIC2

30ro0x0P_94

For RV_PLIC2

31ro0x0P_95

For RV_PLIC2


RV_PLIC.IP_3 @ 0x100c

Interrupt Pending

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
P_127 P_126 P_125 P_124 P_123 P_122 P_121 P_120 P_119 P_118 P_117 P_116 P_115 P_114 P_113 P_112
1514131211109876543210
P_111 P_110 P_109 P_108 P_107 P_106 P_105 P_104 P_103 P_102 P_101 P_100 P_99 P_98 P_97 P_96
BitsTypeResetNameDescription
0ro0x0P_96

For RV_PLIC3

1ro0x0P_97

For RV_PLIC3

2ro0x0P_98

For RV_PLIC3

3ro0x0P_99

For RV_PLIC3

4ro0x0P_100

For RV_PLIC3

5ro0x0P_101

For RV_PLIC3

6ro0x0P_102

For RV_PLIC3

7ro0x0P_103

For RV_PLIC3

8ro0x0P_104

For RV_PLIC3

9ro0x0P_105

For RV_PLIC3

10ro0x0P_106

For RV_PLIC3

11ro0x0P_107

For RV_PLIC3

12ro0x0P_108

For RV_PLIC3

13ro0x0P_109

For RV_PLIC3

14ro0x0P_110

For RV_PLIC3

15ro0x0P_111

For RV_PLIC3

16ro0x0P_112

For RV_PLIC3

17ro0x0P_113

For RV_PLIC3

18ro0x0P_114

For RV_PLIC3

19ro0x0P_115

For RV_PLIC3

20ro0x0P_116

For RV_PLIC3

21ro0x0P_117

For RV_PLIC3

22ro0x0P_118

For RV_PLIC3

23ro0x0P_119

For RV_PLIC3

24ro0x0P_120

For RV_PLIC3

25ro0x0P_121

For RV_PLIC3

26ro0x0P_122

For RV_PLIC3

27ro0x0P_123

For RV_PLIC3

28ro0x0P_124

For RV_PLIC3

29ro0x0P_125

For RV_PLIC3

30ro0x0P_126

For RV_PLIC3

31ro0x0P_127

For RV_PLIC3


RV_PLIC.IP_4 @ 0x1010

Interrupt Pending

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
P_159 P_158 P_157 P_156 P_155 P_154 P_153 P_152 P_151 P_150 P_149 P_148 P_147 P_146 P_145 P_144
1514131211109876543210
P_143 P_142 P_141 P_140 P_139 P_138 P_137 P_136 P_135 P_134 P_133 P_132 P_131 P_130 P_129 P_128
BitsTypeResetNameDescription
0ro0x0P_128

For RV_PLIC4

1ro0x0P_129

For RV_PLIC4

2ro0x0P_130

For RV_PLIC4

3ro0x0P_131

For RV_PLIC4

4ro0x0P_132

For RV_PLIC4

5ro0x0P_133

For RV_PLIC4

6ro0x0P_134

For RV_PLIC4

7ro0x0P_135

For RV_PLIC4

8ro0x0P_136

For RV_PLIC4

9ro0x0P_137

For RV_PLIC4

10ro0x0P_138

For RV_PLIC4

11ro0x0P_139

For RV_PLIC4

12ro0x0P_140

For RV_PLIC4

13ro0x0P_141

For RV_PLIC4

14ro0x0P_142

For RV_PLIC4

15ro0x0P_143

For RV_PLIC4

16ro0x0P_144

For RV_PLIC4

17ro0x0P_145

For RV_PLIC4

18ro0x0P_146

For RV_PLIC4

19ro0x0P_147

For RV_PLIC4

20ro0x0P_148

For RV_PLIC4

21ro0x0P_149

For RV_PLIC4

22ro0x0P_150

For RV_PLIC4

23ro0x0P_151

For RV_PLIC4

24ro0x0P_152

For RV_PLIC4

25ro0x0P_153

For RV_PLIC4

26ro0x0P_154

For RV_PLIC4

27ro0x0P_155

For RV_PLIC4

28ro0x0P_156

For RV_PLIC4

29ro0x0P_157

For RV_PLIC4

30ro0x0P_158

For RV_PLIC4

31ro0x0P_159

For RV_PLIC4


RV_PLIC.IP_5 @ 0x1014

Interrupt Pending

Reset default = 0x0, mask 0x1ffffff
31302928272625242322212019181716
  P_184 P_183 P_182 P_181 P_180 P_179 P_178 P_177 P_176
1514131211109876543210
P_175 P_174 P_173 P_172 P_171 P_170 P_169 P_168 P_167 P_166 P_165 P_164 P_163 P_162 P_161 P_160
BitsTypeResetNameDescription
0ro0x0P_160

For RV_PLIC5

1ro0x0P_161

For RV_PLIC5

2ro0x0P_162

For RV_PLIC5

3ro0x0P_163

For RV_PLIC5

4ro0x0P_164

For RV_PLIC5

5ro0x0P_165

For RV_PLIC5

6ro0x0P_166

For RV_PLIC5

7ro0x0P_167

For RV_PLIC5

8ro0x0P_168

For RV_PLIC5

9ro0x0P_169

For RV_PLIC5

10ro0x0P_170

For RV_PLIC5

11ro0x0P_171

For RV_PLIC5

12ro0x0P_172

For RV_PLIC5

13ro0x0P_173

For RV_PLIC5

14ro0x0P_174

For RV_PLIC5

15ro0x0P_175

For RV_PLIC5

16ro0x0P_176

For RV_PLIC5

17ro0x0P_177

For RV_PLIC5

18ro0x0P_178

For RV_PLIC5

19ro0x0P_179

For RV_PLIC5

20ro0x0P_180

For RV_PLIC5

21ro0x0P_181

For RV_PLIC5

22ro0x0P_182

For RV_PLIC5

23ro0x0P_183

For RV_PLIC5

24ro0x0P_184

For RV_PLIC5


RV_PLIC.IE0_0 @ 0x2000

Interrupt Enable for Target 0

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
E_31 E_30 E_29 E_28 E_27 E_26 E_25 E_24 E_23 E_22 E_21 E_20 E_19 E_18 E_17 E_16
1514131211109876543210
E_15 E_14 E_13 E_12 E_11 E_10 E_9 E_8 E_7 E_6 E_5 E_4 E_3 E_2 E_1 E_0
BitsTypeResetNameDescription
0rw0x0E_0

Interrupt Enable of Source

1rw0x0E_1

Interrupt Enable of Source

2rw0x0E_2

Interrupt Enable of Source

3rw0x0E_3

Interrupt Enable of Source

4rw0x0E_4

Interrupt Enable of Source

5rw0x0E_5

Interrupt Enable of Source

6rw0x0E_6

Interrupt Enable of Source

7rw0x0E_7

Interrupt Enable of Source

8rw0x0E_8

Interrupt Enable of Source

9rw0x0E_9

Interrupt Enable of Source

10rw0x0E_10

Interrupt Enable of Source

11rw0x0E_11

Interrupt Enable of Source

12rw0x0E_12

Interrupt Enable of Source

13rw0x0E_13

Interrupt Enable of Source

14rw0x0E_14

Interrupt Enable of Source

15rw0x0E_15

Interrupt Enable of Source

16rw0x0E_16

Interrupt Enable of Source

17rw0x0E_17

Interrupt Enable of Source

18rw0x0E_18

Interrupt Enable of Source

19rw0x0E_19

Interrupt Enable of Source

20rw0x0E_20

Interrupt Enable of Source

21rw0x0E_21

Interrupt Enable of Source

22rw0x0E_22

Interrupt Enable of Source

23rw0x0E_23

Interrupt Enable of Source

24rw0x0E_24

Interrupt Enable of Source

25rw0x0E_25

Interrupt Enable of Source

26rw0x0E_26

Interrupt Enable of Source

27rw0x0E_27

Interrupt Enable of Source

28rw0x0E_28

Interrupt Enable of Source

29rw0x0E_29

Interrupt Enable of Source

30rw0x0E_30

Interrupt Enable of Source

31rw0x0E_31

Interrupt Enable of Source


RV_PLIC.IE0_1 @ 0x2004

Interrupt Enable for Target 0

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
E_63 E_62 E_61 E_60 E_59 E_58 E_57 E_56 E_55 E_54 E_53 E_52 E_51 E_50 E_49 E_48
1514131211109876543210
E_47 E_46 E_45 E_44 E_43 E_42 E_41 E_40 E_39 E_38 E_37 E_36 E_35 E_34 E_33 E_32
BitsTypeResetNameDescription
0rw0x0E_32

For RV_PLIC1

1rw0x0E_33

For RV_PLIC1

2rw0x0E_34

For RV_PLIC1

3rw0x0E_35

For RV_PLIC1

4rw0x0E_36

For RV_PLIC1

5rw0x0E_37

For RV_PLIC1

6rw0x0E_38

For RV_PLIC1

7rw0x0E_39

For RV_PLIC1

8rw0x0E_40

For RV_PLIC1

9rw0x0E_41

For RV_PLIC1

10rw0x0E_42

For RV_PLIC1

11rw0x0E_43

For RV_PLIC1

12rw0x0E_44

For RV_PLIC1

13rw0x0E_45

For RV_PLIC1

14rw0x0E_46

For RV_PLIC1

15rw0x0E_47

For RV_PLIC1

16rw0x0E_48

For RV_PLIC1

17rw0x0E_49

For RV_PLIC1

18rw0x0E_50

For RV_PLIC1

19rw0x0E_51

For RV_PLIC1

20rw0x0E_52

For RV_PLIC1

21rw0x0E_53

For RV_PLIC1

22rw0x0E_54

For RV_PLIC1

23rw0x0E_55

For RV_PLIC1

24rw0x0E_56

For RV_PLIC1

25rw0x0E_57

For RV_PLIC1

26rw0x0E_58

For RV_PLIC1

27rw0x0E_59

For RV_PLIC1

28rw0x0E_60

For RV_PLIC1

29rw0x0E_61

For RV_PLIC1

30rw0x0E_62

For RV_PLIC1

31rw0x0E_63

For RV_PLIC1


RV_PLIC.IE0_2 @ 0x2008

Interrupt Enable for Target 0

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
E_95 E_94 E_93 E_92 E_91 E_90 E_89 E_88 E_87 E_86 E_85 E_84 E_83 E_82 E_81 E_80
1514131211109876543210
E_79 E_78 E_77 E_76 E_75 E_74 E_73 E_72 E_71 E_70 E_69 E_68 E_67 E_66 E_65 E_64
BitsTypeResetNameDescription
0rw0x0E_64

For RV_PLIC2

1rw0x0E_65

For RV_PLIC2

2rw0x0E_66

For RV_PLIC2

3rw0x0E_67

For RV_PLIC2

4rw0x0E_68

For RV_PLIC2

5rw0x0E_69

For RV_PLIC2

6rw0x0E_70

For RV_PLIC2

7rw0x0E_71

For RV_PLIC2

8rw0x0E_72

For RV_PLIC2

9rw0x0E_73

For RV_PLIC2

10rw0x0E_74

For RV_PLIC2

11rw0x0E_75

For RV_PLIC2

12rw0x0E_76

For RV_PLIC2

13rw0x0E_77

For RV_PLIC2

14rw0x0E_78

For RV_PLIC2

15rw0x0E_79

For RV_PLIC2

16rw0x0E_80

For RV_PLIC2

17rw0x0E_81

For RV_PLIC2

18rw0x0E_82

For RV_PLIC2

19rw0x0E_83

For RV_PLIC2

20rw0x0E_84

For RV_PLIC2

21rw0x0E_85

For RV_PLIC2

22rw0x0E_86

For RV_PLIC2

23rw0x0E_87

For RV_PLIC2

24rw0x0E_88

For RV_PLIC2

25rw0x0E_89

For RV_PLIC2

26rw0x0E_90

For RV_PLIC2

27rw0x0E_91

For RV_PLIC2

28rw0x0E_92

For RV_PLIC2

29rw0x0E_93

For RV_PLIC2

30rw0x0E_94

For RV_PLIC2

31rw0x0E_95

For RV_PLIC2


RV_PLIC.IE0_3 @ 0x200c

Interrupt Enable for Target 0

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
E_127 E_126 E_125 E_124 E_123 E_122 E_121 E_120 E_119 E_118 E_117 E_116 E_115 E_114 E_113 E_112
1514131211109876543210
E_111 E_110 E_109 E_108 E_107 E_106 E_105 E_104 E_103 E_102 E_101 E_100 E_99 E_98 E_97 E_96
BitsTypeResetNameDescription
0rw0x0E_96

For RV_PLIC3

1rw0x0E_97

For RV_PLIC3

2rw0x0E_98

For RV_PLIC3

3rw0x0E_99

For RV_PLIC3

4rw0x0E_100

For RV_PLIC3

5rw0x0E_101

For RV_PLIC3

6rw0x0E_102

For RV_PLIC3

7rw0x0E_103

For RV_PLIC3

8rw0x0E_104

For RV_PLIC3

9rw0x0E_105

For RV_PLIC3

10rw0x0E_106

For RV_PLIC3

11rw0x0E_107

For RV_PLIC3

12rw0x0E_108

For RV_PLIC3

13rw0x0E_109

For RV_PLIC3

14rw0x0E_110

For RV_PLIC3

15rw0x0E_111

For RV_PLIC3

16rw0x0E_112

For RV_PLIC3

17rw0x0E_113

For RV_PLIC3

18rw0x0E_114

For RV_PLIC3

19rw0x0E_115

For RV_PLIC3

20rw0x0E_116

For RV_PLIC3

21rw0x0E_117

For RV_PLIC3

22rw0x0E_118

For RV_PLIC3

23rw0x0E_119

For RV_PLIC3

24rw0x0E_120

For RV_PLIC3

25rw0x0E_121

For RV_PLIC3

26rw0x0E_122

For RV_PLIC3

27rw0x0E_123

For RV_PLIC3

28rw0x0E_124

For RV_PLIC3

29rw0x0E_125

For RV_PLIC3

30rw0x0E_126

For RV_PLIC3

31rw0x0E_127

For RV_PLIC3


RV_PLIC.IE0_4 @ 0x2010

Interrupt Enable for Target 0

Reset default = 0x0, mask 0xffffffff
31302928272625242322212019181716
E_159 E_158 E_157 E_156 E_155 E_154 E_153 E_152 E_151 E_150 E_149 E_148 E_147 E_146 E_145 E_144
1514131211109876543210
E_143 E_142 E_141 E_140 E_139 E_138 E_137 E_136 E_135 E_134 E_133 E_132 E_131 E_130 E_129 E_128
BitsTypeResetNameDescription
0rw0x0E_128

For RV_PLIC4

1rw0x0E_129

For RV_PLIC4

2rw0x0E_130

For RV_PLIC4

3rw0x0E_131

For RV_PLIC4

4rw0x0E_132

For RV_PLIC4

5rw0x0E_133

For RV_PLIC4

6rw0x0E_134

For RV_PLIC4

7rw0x0E_135

For RV_PLIC4

8rw0x0E_136

For RV_PLIC4

9rw0x0E_137

For RV_PLIC4

10rw0x0E_138

For RV_PLIC4

11rw0x0E_139

For RV_PLIC4

12rw0x0E_140

For RV_PLIC4

13rw0x0E_141

For RV_PLIC4

14rw0x0E_142

For RV_PLIC4

15rw0x0E_143

For RV_PLIC4

16rw0x0E_144

For RV_PLIC4

17rw0x0E_145

For RV_PLIC4

18rw0x0E_146

For RV_PLIC4

19rw0x0E_147

For RV_PLIC4

20rw0x0E_148

For RV_PLIC4

21rw0x0E_149

For RV_PLIC4

22rw0x0E_150

For RV_PLIC4

23rw0x0E_151

For RV_PLIC4

24rw0x0E_152

For RV_PLIC4

25rw0x0E_153

For RV_PLIC4

26rw0x0E_154

For RV_PLIC4

27rw0x0E_155

For RV_PLIC4

28rw0x0E_156

For RV_PLIC4

29rw0x0E_157

For RV_PLIC4

30rw0x0E_158

For RV_PLIC4

31rw0x0E_159

For RV_PLIC4


RV_PLIC.IE0_5 @ 0x2014

Interrupt Enable for Target 0

Reset default = 0x0, mask 0x1ffffff
31302928272625242322212019181716
  E_184 E_183 E_182 E_181 E_180 E_179 E_178 E_177 E_176
1514131211109876543210
E_175 E_174 E_173 E_172 E_171 E_170 E_169 E_168 E_167 E_166 E_165 E_164 E_163 E_162 E_161 E_160
BitsTypeResetNameDescription
0rw0x0E_160

For RV_PLIC5

1rw0x0E_161

For RV_PLIC5

2rw0x0E_162

For RV_PLIC5

3rw0x0E_163

For RV_PLIC5

4rw0x0E_164

For RV_PLIC5

5rw0x0E_165

For RV_PLIC5

6rw0x0E_166

For RV_PLIC5

7rw0x0E_167

For RV_PLIC5

8rw0x0E_168

For RV_PLIC5

9rw0x0E_169

For RV_PLIC5

10rw0x0E_170

For RV_PLIC5

11rw0x0E_171

For RV_PLIC5

12rw0x0E_172

For RV_PLIC5

13rw0x0E_173

For RV_PLIC5

14rw0x0E_174

For RV_PLIC5

15rw0x0E_175

For RV_PLIC5

16rw0x0E_176

For RV_PLIC5

17rw0x0E_177

For RV_PLIC5

18rw0x0E_178

For RV_PLIC5

19rw0x0E_179

For RV_PLIC5

20rw0x0E_180

For RV_PLIC5

21rw0x0E_181

For RV_PLIC5

22rw0x0E_182

For RV_PLIC5

23rw0x0E_183

For RV_PLIC5

24rw0x0E_184

For RV_PLIC5


RV_PLIC.THRESHOLD0 @ 0x200000

Threshold of priority for Target 0

Reset default = 0x0, mask 0x3
31302928272625242322212019181716
 
1514131211109876543210
  THRESHOLD0
BitsTypeResetNameDescription
1:0rw0x0THRESHOLD0

RV_PLIC.CC0 @ 0x200004

Claim interrupt by read, complete interrupt by write for Target 0. Value read/written is interrupt ID. Reading a value of 0 means no pending interrupts.

Reset default = 0x0, mask 0xff
31302928272625242322212019181716
 
1514131211109876543210
  CC0
BitsTypeResetNameDescription
7:0rwxCC0

RV_PLIC.MSIP0 @ 0x4000000

msip for Hart 0. Write 1 to here asserts software interrupt for Hart msip_o[0], write 0 to clear.

Reset default = 0x0, mask 0x1
31302928272625242322212019181716
 
1514131211109876543210
  MSIP0
BitsTypeResetNameDescription
0rw0x0MSIP0

Software Interrupt Pending register


RV_PLIC.ALERT_TEST @ 0x4004000

Alert Test Register.

Reset default = 0x0, mask 0x1
31302928272625242322212019181716
 
1514131211109876543210
  fatal_fault
BitsTypeResetNameDescription
0woxfatal_fault

'Write 1 to trigger one alert event of this kind.'